Server Architecture Dedicated Compute Resources Infrastructure Workloads
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Solution Overview
Problem
Conventional server architectures using general-purpose processors (GPPs) are inefficient in executing infrastructure-related workloads, leading to excessive resource consumption and suboptimal execution of tasks due to the need for frequent data movement and processing of I/O and storage functions, which burdens the processor with non-essential tasks.
Innovation Solution
Implementing a server architecture with dedicated systems, such as Intelligent Memory Fabric Elements (IMFEs), which offload I/O and storage functions from the server processor to workload-optimized processors, allowing the server processor to focus on data processing and virtual machine support, using shared memory systems for efficient data exchange between processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If general-purpose processors are used to execute both data processing functions and infrastructure-related functions, then the processor can serve multiple roles, but efficiency deteriorates and resource consumption increases
Solution Approach 1:
The patent divides the processor system into two distinct parts: general-purpose processors for data processing functions and specialized infrastructure processors for I/O and storage functions. This segmentation allows each processor type to be optimized for its specific workload, resolving the contradiction between versatility and efficiency by having multiple specialized components work together rather than one general-purpose component handling everything.
Solution Approach 2:
The patent extracts infrastructure-related functions (I/O control, storage management) from the general-purpose processor and places them in dedicated infrastructure processors. This extraction removes the burden of non-essential tasks from the GPP, allowing it to focus on data processing while specialized processors handle infrastructure workloads, thereby improving overall execution efficiency.
2Device complexity
If general-purpose processors handle I/O and storage functions, then a single processor can manage all tasks, but resource consumption increases due to frequent data movement
Solution Approach 1:
The patent introduces a shared memory system as an intermediary between general-purpose processors and infrastructure processors. This shared memory allows efficient data exchange without requiring frequent data movement through external memory interfaces, reducing the consumption of processor cycles, memory bandwidth, and energy while maintaining the ability to manage multiple tasks.
3Adaptability or versatility
If general-purpose processors execute infrastructure-related workloads, then the system can operate with fewer processor types, but internal resources such as buses and memory bandwidth are consumed
Solution Approach 1:
By segmenting the processing workload between GPPs and infrastructure processors, the patent reduces the burden on internal resources of the GPP. The infrastructure processors handle I/O and storage functions independently, preventing excessive consumption of GPP internal resources such as buses and memory bandwidth while maintaining system versatility through the combined capabilities of both processor types.
Data Source
AI summary
Systems, methods, and articles of manufacture comprising processor-readable storage media are provided for implementing server architectures having dedicated systems for processing infrastructure-related workloads. For example, a computing system includes a server node. The server node includes a first processor, a second processor, and a shared memory system. The first processor is configured to execute data computing functions of an application. The second processor is configured to execute input/output (I/O) functions for the application in parallel with the data computing functions of the application executed by the first processor. The shared memory system is configured to enable exchange of messages and data between the first and second processors.