Server Processor P-State Selection for Energy Cost Optimization

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Solution Overview

Problem

Chip-level power management in servers reduces instantaneous power consumption but leads to increased total energy consumption and longer computation times, resulting in higher electricity costs and emissions, as it fails to account for the integration of power over time, which is how energy is charged.

Innovation Solution

A system and method that determine the cumulative energy expended by a server for each power level state and select the optimal state based on energy cost information to minimize energy costs, using intelligent power monitoring and transaction metering, rather than relying solely on power reduction strategies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If chip-level power management is implemented to reduce instantaneous power consumption, then power usage is reduced, but total energy consumption increases and computation time increases

Engineering Contradiction:
Improveinstantaneous power consumptionVSAvoidtotal energy consumption
Core Design Contradiction:
PowerVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the processor's P-state based on real-time workload conditions and energy cost information. Instead of static power management, the controller continuously monitors transaction rates and dynamically selects optimal power states, allowing the system to adapt between low-power and high-performance modes according to actual needs, thereby resolving the contradiction between instantaneous power reduction and total energy consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operating parameters by considering both power level and transaction rate when selecting P-states. Rather than simply reducing power, the system evaluates the combination of power consumption and computational throughput, selecting states that optimize the ratio of energy efficiency to performance, thus avoiding the energy waste caused by excessive power reduction that slows computation

Inventive Principle:
Principle #35Parameter changes

2Power

If chip-level power management is implemented to reduce instantaneous power consumption, then power usage is reduced, but computation time increases

Engineering Contradiction:
Improveinstantaneous power consumptionVSAvoidcomputation time
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The system dynamically adjusts the processor's P-state based on real-time workload conditions and energy cost information. Instead of static power management, the controller continuously monitors transaction rates and dynamically selects optimal power states, allowing the system to adapt between low-power and high-performance modes according to actual needs, thereby resolving the contradiction between instantaneous power reduction and total energy consumption

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system preemptively prevents excessive computation time by evaluating transaction rates before committing to a P-state selection. When the workload requires high transaction rates, the system anticipates the need for higher performance and avoids selecting low-power states that would cause unacceptable delays, thus counteracting the potential harm of computation time increase before it occurs

Inventive Principle:
Principle #9Preliminary anti-action

3Power

If power level states are selected based solely on power reduction, then instantaneous power is reduced, but total energy cost increases due to longer computation time

Engineering Contradiction:
Improveinstantaneous power levelVSAvoidtotal energy cost
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The system incorporates feedback by continuously monitoring transaction rates and using this information to adjust P-state selections. The controller receives feedback about actual workload demands and modifies power state decisions accordingly, ensuring that power reduction does not lead to excessive computation time that would ultimately increase total energy consumption

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts the processor's P-state based on real-time workload conditions and energy cost information. Instead of static power management, the controller continuously monitors transaction rates and dynamically selects optimal power states, allowing the system to adapt between low-power and high-performance modes according to actual needs, thereby resolving the contradiction between instantaneous power reduction and total energy consumption

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10101784B2System and method for controlling energy usage in a server
Publication Date: 2018.10.16 ORACLE AMERICAN INC
  • US10101784B2 patent drawing
  • US10101784B2 patent drawing
  • US10101784B2 patent drawing

AI summary

A system for controlling energy usage in a server having a processor, where the system includes a memory for storing energy cost information, and a controller for determining a transaction rate for the processor. The controller is also for determining a cumulative of energy expended by the server based on the determined transaction rate for each of a number of available power level states (P-states) for operation of the processor, and for selecting one of the available P-states for operation of the processor based on the determined cumulative energy expended and the stored energy cost information.