Server Power-Down Detection via PCH Register Bits
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Solution Overview
Problem
Traditional methods for detecting power-down completion in servers during AC cycle tests are unreliable and costly, as they rely on oscilloscopes to measure voltage levels, which are inaccurate and pose risks of short circuits due to electromagnetic interference.
Innovation Solution
A method and system where the BIOS detects the setting of bits in a PCH register and sends power-down completion information to the BMC, eliminating the need for oscilloscopes and allowing for simpler, more accurate detection without the risk of short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional oscilloscope-based detection method is used to measure power supply voltage, then power-down state can be detected, but the measurement accuracy deteriorates due to electromagnetic field interference and the risk of short circuit increases
Solution Approach 1:
The patent replaces the mechanical/electrical measurement system (oscilloscope probe contacting test points) with a software-based detection system. The BIOS reads register bits of the PCH to determine power-down state, eliminating physical contact and electromagnetic interference issues while improving both reliability and measurement precision.
Solution Approach 2:
The patent introduces an intermediary detection mechanism - the register bits in the PCH - that indirectly indicate the power-down state without requiring direct voltage measurement. This intermediary provides reliable detection without the risks associated with direct electrical contact during AC cycling.
2Device complexity
If Power-Good signals from DC-DC module are used to detect power supply state, then detection process is simplified, but the detection accuracy deteriorates due to large error margin of 8% to 20%
Solution Approach 1:
The patent replaces the unreliable Power-Good signal mechanism with a software-based register bit reading system. This substitution eliminates the 8%-20% error margin inherent in Power-Good signals while maintaining simple detection through BIOS register access, achieving both simplicity and high precision.
3Reliability
If AC cycle test is performed with repeated power on and power down, then automatic startup function can be tested, but the test environment construction time increases and short circuit risk increases due to oscilloscope probe contact
Solution Approach 1:
The patent replaces the physical oscilloscope-based test environment with a software-based detection system integrated into the BIOS. This eliminates the need for probe contact and complex test environment setup, reducing construction time to minimal configuration while maintaining reliable testing of automatic startup functions through register bit monitoring.
Data Source
AI summary
A server power-down detection method and system, a device, and a storage medium are disclosed, wherein the method includes: in response to the completion of hardware power on, controlling a PCH to read BIOS codes from BIOS flash storage particles via a first interface and running the BIOS codes; detecting whether bits of a register of the PCH have been set; in response to the bits of the register of the PCH being set, controlling the PCH to send power-down completion information to a BMC via a second interface; and in response to the BMC receiving the power-down completion information, recording the power-down completion information in BMC flash storage particles, and performing the hardware power on again until a test is completed.