Server Tray Power Cycling Circuit for DC Busbar Racks

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Solution Overview

Problem

In server systems powered by DC busbar, power cycling individual servers is challenging as they are always on or off together, making operations like firmware updates or server resets difficult without disrupting other connected servers.

Innovation Solution

Implementing a timer-based circuit that manages power cycling for server trays, allowing power to be cut to the tray circuitry except for the timer, which after a specified time, re-establishes power to ensure capacitors and components discharge, enabling staggered power restoration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If DC busbar provides continuous power to all server trays, then power reliability is improved, but individual server power cycling becomes difficult

Engineering Contradiction:
Improvepower reliabilityVSAvoidindividual server power cycling
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent segments the power delivery system by introducing individual power cycling control for each server tray or circuit board. The power cycling controller receives power cycling commands and controls the power state of specific server trays independently, while other trays remain powered. This segmentation allows individual power cycling without affecting the entire DC busbar system, resolving the contradiction between continuous power reliability and individual power control capability.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If power is cut to server tray circuitry for power cycling, then individual server reset is enabled, but capacitors and components require discharge time

Engineering Contradiction:
Improveindividual server resetVSAvoidpower cycle time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent implements preliminary action by controlling the power on/off sequence of different circuit boards within the server tray. The power cycling controller can power off certain circuit boards first, wait for capacitor discharge, then power on other circuit boards or the entire tray after the appropriate time delay. This staged preliminary power cycling approach ensures complete discharge of capacitors and components while enabling individual server reset functionality.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If all servers are powered on or off together from DC busbar, then power management is simplified, but firmware updates and selective resets are impossible

Engineering Contradiction:
Improvepower management complexityVSAvoidselective power cycling capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent introduces a power cycling controller as an intermediary device between the DC busbar power source and the server trays. This controller receives power cycling commands and selectively controls the power state of individual server trays or circuit boards. The intermediary controller manages the complexity of selective power cycling, allowing firmware updates and targeted resets without requiring changes to the DC busbar infrastructure, thus maintaining relative simplicity while enabling versatility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260044195A1Power cycling control for server tray systems and circuitry
Publication Date: 2026.02.12 NVIDIA CORP
  • US20260044195A1 patent drawing
  • US20260044195A1 patent drawing
  • US20260044195A1 patent drawing

AI summary

Approaches presented herein provide for the management of power supplied to server trays, such as allowing for power cycling of individual server trays in a server rack powered by a DC busbar. In at least one embodiment, a timer circuit may be triggered by a power cycling command to prevent power from a power source, such as a busbar, to be provided to processing circuitry within a server tray of a server rack, except the timer circuit. The power can be caused be no longer available to the processing circuitry, ending operation of logical operations of the processing circuitry. After a period of time, the timer circuit can generate a signal to cause the power from the power source to be made available to the processing circuitry, allowing for resumed operation. At least a minimum amount of capacitance may be discharged from the processing circuitry during the period of time.