Set Predictor Logic for Cache Power Reduction
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Solution Overview
Problem
The increasing energy consumption of cache levels in processors due to higher performance requirements and high clock rates leads to significant power usage, necessitating a method to reduce cache access power without compromising processor performance.
Innovation Solution
Implementing a set predictor logic and cache that switches off unnecessary parts of the cache circuitry based on pre-cached set indices, allowing only the required cache sets to be activated, thereby reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the cache operates at high clock rates to meet performance requirements, then processor velocity is improved, but energy consumption of the cache increases considerably
Solution Approach 1:
The cache is divided into multiple independently controllable sets, allowing selective activation of only those sets needed for current access patterns. The set predictor logic segments the cache control into individual set-level enable/disable operations, reducing overall power consumption while maintaining performance for active sets.
Solution Approach 2:
The cache configuration is made dynamic through the set predictor logic that continuously monitors access patterns and adjusts which cache sets are active. This dynamic adaptation allows the cache to optimize between performance and power consumption by activating only necessary sets based on real-time workload characteristics.
2Speed
If additional buffer levels are added to increase processor velocity, then data access speed is improved, but the complexity of the cache system increases
Solution Approach 1:
The set predictor logic performs preliminary action by pre-determining which cache sets will be needed before actual cache access occurs. This prediction mechanism simplifies the control logic for multi-level caches by providing advance information about set requirements, reducing the complexity of coordination between multiple cache levels.
3Reliability
If the cache is fully activated to ensure data availability, then access reliability is improved, but power consumption increases
Solution Approach 1:
The set predictor logic enables the cache system to self-service by automatically identifying and activating only the necessary cache sets based on access patterns. This self-managing capability ensures data reliability for predicted accesses while minimizing power consumption by leaving other sets inactive, eliminating the need for full cache activation.
Data Source
AI summary
A computer implemented method for saving cache access power is suggested. The cache is provided with a set predictor logic for providing a generated set selection for selecting a set in the cache, and with a set predictor cache for pre-caching generated set indices of the cache. The method comprises further: receiving a part of a requested memory address; checking, in the set predictor cache, whether the requested memory address is already generated; in the case, that the requested memory address has already been generated: securing that the set predictor cache is switched off; issuing the pre-cached generated set index towards the cache; and securing that only that part of the cache is switched on that is associated with the pre-cached generated set index.