SEU-Tolerant Flip-Flop With Tristate Charge Isolation
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Solution Overview
Problem
Flip-flops designed with redundancy features for radiation-induced single event upsets (SEUs) suffer from poor noise margins due to charge transfer feedback, leading to write failures and reduced reliability.
Innovation Solution
Incorporating a tristate driver between master and slave latch circuitry to inhibit charge transfer, which improves the signal noise margin (SNM) and SEU tolerance by reducing noise/charge flow from the slave to the master circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundancy features (e.g., redundant storage nodes) are added to protect against SEUs, then SEU tolerance is improved, but device complexity increases
Solution Approach 1:
A tristate driver is introduced as an intermediary component between the master latch and slave latch circuits. This driver isolates the master latch output from direct feedback to the slave latch input, preventing charge transfer while maintaining signal transmission during valid clock periods. The intermediary structure adds SEU tolerance without requiring extensive redundancy throughout the entire circuit.
2Device complexity
If charge transfer feedback is present from slave to master latch, then circuit simplicity is maintained, but noise margin deteriorates
Solution Approach 1:
The tristate driver serves as a mediator that blocks the feedback path from slave latch to master latch. During active clock phases, the driver enables signal transmission; during other phases, it enters a high-impedance state that prevents charge transfer. This intermediary mechanism maintains circuit simplicity while significantly improving noise margin by eliminating the harmful feedback path.
3Reliability
If tristate driver is added to inhibit charge transfer, then noise margin is improved, but device complexity increases
Solution Approach 1:
The tristate driver changes the electrical parameters (impedance state) of the feedback path dynamically based on clock signals. During active periods, the driver presents low impedance for signal transmission; during inactive periods, it presents high impedance to block charge transfer. This parameter change approach improves noise margin with minimal additional complexity, as the driver reuses existing clock signal timing.
Data Source
AI summary
Embodiments herein describe single event upset (SEU) tolerant flip-flop that includes master latch circuitry, slave latch circuitry, and a tristate driver having an input coupled to an output of the master latch circuitry and an output coupled to a first data input of the slave latch circuitry, where the first tristate driver is configured to inhibit charge transfer from the first data input of the slave latch circuitry to the output of the master latch circuitry.