SEU Protection Circuit Using 1-Hot Parity Switching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing SEU protection methods, such as triple-redundancy with voting circuits, require significant logic and circuitry, which is inefficient and costly.

Innovation Solution

A circuit and method using 1-hot encoded primary and redundant data values, a parity engine (XOR or XNOR gate) for parity operation, and a multiplexer to select between primary and redundant values based on parity results, eliminating the need for voting circuits and triple-redundancy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If triple-redundancy with voting circuit is used for SEU protection, then reliability is improved, but device complexity increases

Engineering Contradiction:
ImproveSEU protection capabilityVSAvoidlogic and circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the encoding parameter from standard binary to 1-hot encoded format. This parameter change enables the use of simple parity checking (XOR operation) instead of complex voting circuits, while maintaining SEU protection capability. The 1-hot encoding ensures that only one bit is high at any time, making parity checking sufficient to detect and correct single-bit upsets.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts and eliminates the voting circuit from the traditional triple-redundancy architecture. By using 1-hot encoding with parity checking, the complex voting logic is removed entirely, replacing it with simple XOR-based parity generation and comparison circuits that achieve the same error correction function with much lower complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If triple-redundancy approach is used, then SEU protection is achieved, but manufacturing cost increases

Engineering Contradiction:
ImproveSEU protectionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent replaces expensive triple-redundancy circuitry with cheaper alternative components. The 1-hot encoded parity checking system uses simpler, less expensive logic gates (XOR gates) compared to the complex voting circuits required by triple-redundancy, thereby reducing manufacturing cost while maintaining protection effectiveness.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

By changing the data encoding parameter to 1-hot format, the patent enables a simpler circuit implementation that is easier and less expensive to manufacture. The parity-based error detection and correction becomes feasible with basic logic gates rather than requiring complex voting circuitry, directly reducing manufacturing costs.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9292378B2Single event upset protection circuit and method
Publication Date: 2016.03.22 TELEDYNE SCIENTIFIC & IMAGING LLC
  • US9292378B2 patent drawing
  • US9292378B2 patent drawing
  • US9292378B2 patent drawing

AI summary

An SEU protection circuit comprises first and second storage means for receiving primary and redundant versions, respectively, of an n-bit wide data value that is to be corrected in case of an SEU occurrence; the correction circuit requires that the data value be a 1-hot encoded value. A parity engine performs a parity operation on the n bits of the primary data value. A multiplexer receives the primary and redundant data values and the parity engine output at respective inputs, and is arranged to pass the primary data value to an output when the parity engine output indicates ‘odd’ parity, and to pass the redundant data value to the output when the parity engine output indicates ‘even’ parity. The primary and redundant data values are suitably state variables, and the parity engine is preferably an n-bit wide XOR or XNOR gate.