SEU Stabilized Memory Cell With Series ReRAM

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Solution Overview

Problem

Existing memory cells for user-configurable integrated circuits face challenges in providing adequate Single-Event Upset (SEU) immunity, particularly due to variations in resistances of virgin ReRAM devices and potential short circuits, which can compromise SEU protection and increase programming overhead.

Innovation Solution

The implementation of a memory cell design that incorporates a cross-coupled latch with series-connected pairs of virgin ReRAM devices, providing an RC delay to prevent state changes during particle strikes and enhancing SEU protection, while also addressing redundancy and impedance variations through additional series-connected ReRAM pairs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single virgin ReRAM device is used for cross-coupling, then the memory cell provides SEU protection, but the resistance variations and potential short circuits compromise SEU immunity

Engineering Contradiction:

ImproveSEU immunityVSAvoidresistance variation

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent divides the cross-coupling path into multiple series-connected ReRAM devices (e.g., three or more) instead of using a single device. This segmentation reduces the impact of resistance variations in individual devices and provides redundancy against short circuit failures, thereby improving SEU immunity while accounting for manufacturing precision limitations.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent incorporates additional series-connected ReRAM devices as a protective measure before SEU events occur. This creates a cushion of high impedance that maintains SEU protection even when some devices experience resistance variations or short circuits, ensuring reliable operation despite manufacturing variations.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If series-connected pairs of virgin ReRAM devices are added, then SEU protection is enhanced, but the device complexity increases

Engineering Contradiction:

ImproveSEU protectionVSAvoidcircuit structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the same virgin ReRAM devices to serve multiple functions: they provide both the high impedance for SEU protection and the cross-coupling functionality for latch stability. By making the ReRAM devices multi-functional, the patent enhances SEU protection without proportionally increasing device complexity, as the same components perform multiple roles in the circuit.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Stability of the object's composition

If multiple series-connected ReRAM devices are used, then impedance stability is improved, but the programming overhead increases

Engineering Contradiction:

Improveimpedance stabilityVSAvoidprogramming overhead

Core Design Contradiction:

Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent leverages the inherent high impedance state of virgin ReRAM devices, which naturally provides the desired impedance stability without requiring additional programming operations. The devices self-maintain their high impedance state during normal operation, reducing the need for frequent programming overhead while preserving impedance stability for SEU protection.

Inventive Principle:

Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively stabilizes memory cells against SEUs, offering robust SEU immunity with reduced risk of transient errors and maintaining high impedance without degrading SRAM speed, even in the presence of manufacturing defects or disturb conditions.

Implementation Method 1

at least one cross coupling circuit path in the latch portion including a first series-connected pair of vertical resistors

Methodology Applied

Scientific EffectRC delay:

Data Source

PatentUS11031078B2SEU stabilized memory cells

Publication Date: 2021.06.08 MICROSEMI SOC CORP

AI summary

A single-event-upset (SEU) stabilized memory cell includes a latch portion including a cross-coupled latch, and at least one cross coupling circuit path in the latch portion including a first series-connected pair of vertical resistors.