Seven-Level ANPC Inverter With Capacitor Voltage Balancing
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Solution Overview
Problem
Existing single-phase seven-level inverters face challenges in achieving high power density and efficiency due to complex topologies, high component count, and capacitor voltage balancing issues, particularly with cascaded and switched-capacitor designs, which limit their application in high-power and compact designs.
Innovation Solution
A single-phase active neutral point clamped seven-level (SANPC-7L) inverter topology with eight power switches and three series-connected DC-link capacitors, utilizing a Karnaugh Map technique for modulation logic and a variable-reference voltage-balance control method to balance capacitor voltages, achieving seven output voltage levels with reduced power components and voltage stresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a full-bridge inverter with bipolar or unipolar pulse width modulation is used, then the inverter can be implemented with a simple topology, but the power switches operate at high switching frequency leading to high switching losses and high dv/dt requiring larger output filters
Solution Approach 1:
The patent segments the DC-link voltage into three series-connected capacitors, creating seven distinct voltage levels (0, ±Vdc/6, ±Vdc/3, ±Vdc/2). This segmentation allows the inverter to operate with lower switching voltages across multiple levels rather than full DC-link voltage, reducing switching losses while maintaining a relatively simple topology structure
Solution Approach 2:
The patent employs dynamic voltage-balance control methodology that actively manages the voltage distribution across the three DC-link capacitors in real-time. This dynamic control enables the system to maintain balanced capacitor voltages and optimize switching patterns, reducing overall switching losses while managing the complexity of the multilevel structure
2Object-generated harmful factors
If more output voltage levels are implemented to reduce output harmonics, then the total harmonic distortion decreases with a smaller filter, but the switching voltage reduces which brings in reducing switching losses
Solution Approach 1:
The DC-link voltage is segmented into three series capacitors that create seven output voltage levels. This segmentation directly reduces output harmonics by providing more voltage steps in the PWM waveform, allowing smaller filter components while simultaneously reducing the voltage stress on individual switches, thereby reducing switching losses
Solution Approach 2:
The patent changes the voltage parameter distribution by creating seven distinct voltage levels instead of traditional two or three levels. This parameter change in voltage discretization reduces both harmonics and switching losses, as switches operate at lower voltage levels more frequently throughout the modulation cycle
3Object-generated harmful factors
If cascaded seven-level inverter with three independent DC sources is used, then the seven output voltage levels are achieved, but the device complexity increases with many power devices and capacitor voltage balancing becomes challenging
Solution Approach 1:
The patent merges three DC-link capacitors into a single unified structure connected in series, sharing common terminals and control circuitry, rather than using three independent DC sources. This merging achieves seven voltage levels while significantly reducing the quantity of power devices and simplifying the overall topology structure
Solution Approach 2:
The three series-connected capacitors serve multiple functions simultaneously: they create the seven voltage levels, provide energy storage, and enable voltage balancing through their shared structure. This multi-functionality reduces the need for separate components for each function, decreasing overall device complexity
4Power
If single-phase seven-level inverter with one DC input source and three DC-link capacitors in series is used, then the power density increases, but the capacitor voltages are hard to balance due to insufficient redundant switching states
Solution Approach 1:
The patent implements a feedback-based voltage-balance control methodology that continuously monitors the voltages across the three DC-link capacitors and adjusts the switching patterns accordingly. This feedback mechanism provides the necessary control to balance capacitor voltages even with limited redundant switching states, maintaining system stability in high power density applications
Solution Approach 2:
The system employs dynamic voltage-balance control that adapts switching patterns in real-time based on capacitor voltage conditions. This dynamic approach enables effective voltage balancing with fewer redundant states by optimally utilizing available switching combinations rather than relying on static redundancy
Data Source
AI summary
An exemplary system includes an inverter coupled to a DC source, a plurality of power switches and a plurality of DC-link capacitors that synthesize seven output voltage levels. In one example the inverter includes a four-level active neutral pointed clamped inverter (4L-ANCP) that includes six power switches of the plurality of power switches and is operated at a switching frequency with a first voltage stress level, and a half-bridge that includes two other of the power switches coupled to the 4L-ANCP and operated at a fundamental frequency with a second voltage stress, the second voltage stress being higher than the first voltage stress level.