SF6 Etching of Silicon Substrates with Copper Oxide Protection

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Solution Overview

Problem

Conventional methods for thinning silicon substrates to expose through-silicon vias (TSVs) in 3D-stacking are inefficient, leading to inconsistent protrusion heights and microtrenching, and existing etch chemistries are slow and non-selective, causing copper sulfide formation which corrodes the TSVs.

Innovation Solution

The use of a sulfur hexafluoride (SF6)-containing etchant for selective removal of silicon substrates relative to copper features, with an initial oxidation step to form copper oxide that protects the copper from corrosion, allowing for faster and more controlled etching without forming copper sulfide.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional etch chemistries (KOH, NH4OH, TMAH, HBr/O2, CF4, NF3) are used to remove silicon substrate, then the substrate can be thinned to expose TSV ends, but the etch rate is slow and the process is not selective to oxides

Engineering Contradiction:
Improveetch rateVSAvoidetch selectivity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

An oxide layer is formed on the copper-filled TSV before the etching process. This preliminary oxidation creates a protective barrier that prevents copper sulfide formation during SF6 etching, enabling faster etching rates while maintaining selectivity and preventing corrosion of the TSV structure

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the chemical parameters of the etching process by using SF6-based chemistry instead of conventional etchants. This parameter change enables significantly faster etch rates (up to 8 times faster) while the preliminary oxidation step maintains selectivity by protecting the copper from reacting with the sulfur-containing etchant

Inventive Principle:
Principle #35Parameter changes

2Speed

If bias RF power is used to speed up the etch rate, then the etching process becomes faster, but microtrenching of the substrate material occurs along exposed features

Engineering Contradiction:
Improveetch rateVSAvoidsubstrate surface quality
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent changes the etching chemistry from conventional methods to SF6-based chemistry, which enables faster etch rates without causing microtrenching. The combination of SF6 etchant with preliminary oxidation creates a protective oxide layer on copper features, allowing the use of higher RF power settings to accelerate etching while maintaining smooth substrate surfaces without microtrench defects

Inventive Principle:
Principle #35Parameter changes

3Speed

If SF6-containing etchant is used to remove substrate at faster rate, then the etch rate increases significantly, but copper sulfide forms on the copper-filled TSV causing corrosion and connectivity issues

Engineering Contradiction:
Improveetch rateVSAvoidcopper sulfide formation
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The key solution is to form an oxide layer on the copper-filled TSV before applying the SF6-containing etchant. This preliminary oxidation step creates a protective barrier that prevents the sulfur in the SF6 etchant from reacting with the copper, thereby eliminating copper sulfide formation while maintaining the fast etch rate benefits of SF6 chemistry

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The oxide layer acts as an intermediary protective layer between the copper-filled TSV and the SF6-containing etchant. This intermediate oxide barrier prevents direct contact and harmful chemical reaction between sulfur and copper, allowing the etching process to proceed rapidly without generating copper sulfide corrosion products

Inventive Principle:
Principle #24Intermediary (Mediator)

4Manufacturing precision

If grinding or polishing is used to thin the substrate and expose TSV ends, then the TSV protrusion can be achieved, but the protrusion height is inconsistent (no more than a few hundred microns)

Engineering Contradiction:
ImproveTSV protrusion height consistencyVSAvoidthinning process efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent replaces mechanical thinning processes (grinding, polishing) with a chemical etching process using SF6-based chemistry. This substitution enables precise control of substrate thinning to achieve consistent TSV protrusion heights while improving productivity through faster etch rates. The process provides better controllability and consistency in protrusion height compared to mechanical methods

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables faster and more selective etching of silicon substrates, preventing copper sulfide formation and improving the consistency and connectivity of TSVs in 3D-stacking, enhancing the performance of 3D-integrated circuits.

Implementation Method 1

oxidizing a semiconductor structure comprising a substrate and at least one copper feature

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

A portion of the substrate is removed using an etchant comprising sulfur hexafluoride (SF6) without forming copper sulfide on the at least one copper feature

Methodology Applied
Scientific EffectChemical etching:

Data Source

PatentUS9318438B2Semiconductor structures comprising at least one through-substrate via filled with conductive materials
Publication Date: 2016.04.19 MICRON TECHNOLOGY INC
  • US9318438B2 patent drawing
  • US9318438B2 patent drawing
  • US9318438B2 patent drawing

AI summary

A method for selectively removing material from a substrate without damage to copper filling a via and extending at least partially through the substrate. The method comprises oxidizing a semiconductor structure comprising a substrate and at least one copper feature and removing a portion of the substrate using an etchant comprising SF6 without forming copper sulfide on the at least one copper feature. Additional methods are also disclosed, as well as semiconductor structures produced from such methods.