Stripped-Functionality Logic Locking for IC Security
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Solution Overview
Problem
Existing logic locking techniques are vulnerable to SAT attacks, removal attacks, and other key-recovery attacks, which compromise the security of integrated circuits by allowing attackers to recover the original design or functionality.
Innovation Solution
The implementation of Stripped-Functionality Logic Locking (SFLL) that modifies the design to produce different outputs for protected input patterns, using a restoration unit with a Hamming Distance checker and tamper-proof content-addressable look-up tables to ensure error-free operation with the correct key and erroneous operation with incorrect keys, while protecting specific IP-critical logic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional logic locking is applied to protect IC design, then security against basic attacks is improved, but vulnerability to SAT attacks and key-recovery attacks increases
Solution Approach 1:
The patent intentionally introduces functional errors into the locked circuit that would normally be harmful, but these errors become the security mechanism. When the correct key is applied, the errors are corrected and the circuit functions properly. When incorrect keys are applied, the errors persist and produce incorrect outputs, preventing SAT attacks and key-recovery attacks from succeeding.
Solution Approach 2:
Instead of trying to prevent errors in the locked circuit, the patent inverts the approach by intentionally creating controlled errors and then providing a mechanism to correct them only with the correct key. This inversion transforms the traditional problem of error prevention into a security feature where errors are the barrier against attacks.
2Reliability
If logic locking with additional logic is inserted into the circuit, then protection against IP piracy and reverse engineering is improved, but device complexity increases
Solution Approach 1:
The patent applies logic locking selectively to specific critical regions or gates within the circuit rather than uniformly across the entire design. This localized approach provides IP protection where it is most needed while minimizing the addition of locking logic and reducing overall circuit complexity.
Solution Approach 2:
The patent modifies the functionality of selected gates by changing their logic equations to include key-dependent terms. This parameter change approach allows the same physical gate to provide both original functionality (when correct key is applied) and security functionality (when incorrect key is applied), avoiding the need for separate locking logic structures.
3Reliability
If more key gates are used to enhance security, then resilience against key-recovery attacks is improved, but area overhead and manufacturing cost increase
Solution Approach 1:
The patent designs the locking mechanism so that the same key gates serve multiple functions: they provide security against key-recovery attacks, they control the intentional functional errors, and they enable the circuit to operate correctly only with the authorized key. This multi-functionality reduces the need for additional dedicated security logic and minimizes area overhead.
Data Source
AI summary
An exemplary system, method and computer-accessible medium for modifying a design of an integrated circuit(s) (ICs), which can include, for example, modifying a logic gate(s) in the design for a protected input pattern(s), and providing a restoration unit(s) into the design, where the restoration unit(s) can be configured to (i) produce an error-free output(s) when a correct secret key can be applied to the restoration unit(s), and (ii) produce an erroneous output(s) when an incorrect key can be applied to the restoration unit(s); and ensure that the modified design along with the restoration unit produces at least one erroneous output with respect to the original design for only a pre-determined constant number of incorrect keys based on at least one input pattern.