SGPIO Decoder Buffer Pointer Clock Synchronization

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Solution Overview

Problem

Manual configuration of decoder units in server control systems for SGPIO interfaces is error-prone and costly, requiring matching designs for PCH, RAID, and decoder units, making it difficult to increase the number of components efficiently.

Innovation Solution

A control method that uses a programmable unit with a memory to store and decode data via a serial general purpose input/output bus, utilizing a buffer pointer to synchronize data storage with clock signal transitions, reducing the need for manual operation and simplifying design requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If manual setting is performed for decoder units, then configuration accuracy can be achieved, but external workflow and operation cost increase and human error occurs more easily

Engineering Contradiction:
Improveconfiguration accuracyVSAvoidoperation cost
Core Design Contradiction:
Measurement precisionVSEase of operation

Solution Approach 1:

The decoder unit automatically detects the configuration of PCH or RAID and sets itself without requiring manual external configuration. The unit reads the configuration information from the connected devices and configures its internal parameters automatically, eliminating the need for manual setting while ensuring accurate configuration matching.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system implements automatic detection where the decoder unit queries and reads the configuration information from PCH or RAID devices, receives feedback about the actual configuration, and adjusts its settings accordingly. This closed-loop approach ensures configuration accuracy without manual intervention.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If manual setting is performed for decoder units, then configuration accuracy can be achieved, but human error occurs more easily

Engineering Contradiction:
Improveconfiguration accuracyVSAvoidhuman error rate
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The decoder unit autonomously performs configuration detection and setting, eliminating human involvement in the configuration process. This self-configuration capability removes the source of human error entirely while maintaining accurate configuration through automatic reading of device parameters.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The automatic detection mechanism continuously verifies configuration parameters by reading from the connected PCH or RAID devices, ensuring that the decoder unit's configuration always matches the actual hardware setup without relying on manual input that could contain errors.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If PCH, RAID and decoder unit are designed to match one another, then system compatibility is achieved, but design requirements increase and it is difficult to increase the number of components

Engineering Contradiction:
Improvesystem compatibilityVSAvoiddesign requirements
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The decoder unit is designed with universal configuration detection capability that can automatically adapt to different PCH and RAID device types. Instead of requiring dedicated decoder units for each device combination, a single decoder unit can detect and configure itself for various device types, reducing design requirements and enabling easier component expansion.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The decoder unit implements dynamic configuration where its operating parameters are not fixed at design time but are automatically adjusted based on the detected PCH or RAID configuration. This dynamic adaptation allows the same hardware to work with multiple device types without requiring pre-matched designs.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10324626B2Control method for storing data according to buffer pointer at clock signal conversions
Publication Date: 2019.06.18 INVENTEC PUDONG TECH CORPOARTION
  • US10324626B2 patent drawing
  • US10324626B2 patent drawing
  • US10324626B2 patent drawing

AI summary

A control method of a control system includes storing output data to a memory according to a buffer pointer when a clock signal converts to a second level from a first level; storing input data to the memory according to the buffer pointer when the clock signal converts to the first level from the second level; and updating the buffer point.