Self-Aligned SGT Gate Electrode Formation via Composite Metal-Polysilicon Etching
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Solution Overview
Problem
The increasing integration of semiconductor integrated circuits, particularly those using MOS transistors, faces challenges in suppressing leak currents due to the miniaturization of MOS transistors, leading to difficulties in reducing circuit area and the formation of voids between silicon pillars, which complicates gate material processing and requires non-self-aligned processes.
Innovation Solution
A method for producing a semiconductor device with a surrounding gate transistor (SGT) structure using a thin gate material and a metal gate, employing a self-aligned process that involves forming pillar-shaped silicon layers, depositing a gate insulating film, and etching to create a laminated structure of metal and polysilicon films for the gate electrodes, ensuring a direct contact and preventing short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If a thick gate material is deposited between silicon pillars to reduce distance, then the distance between silicon pillars is decreased, but voids are formed between the silicon pillars
Solution Approach 1:
A gate insulating film is formed around the silicon pillars before depositing the gate material. This preliminary formation of the insulating film prevents void formation during subsequent gate material deposition, allowing thin gate material to be used without creating defects.
Solution Approach 2:
The patent changes the gate material thickness parameter from thick to thin, and introduces a gate insulating film with specific dielectric properties. This parameter change allows achieving the desired electrical characteristics without forming voids, resolving the contradiction between reducing pillar distance and preventing void formation.
2Ease of manufacture
If a resist covering the upper portion of silicon pillar is formed to create gate line, then gate line formation is achieved, but the process is not self-aligned
Solution Approach 1:
The gate insulating film serves multiple functions: it acts as an insulator, a spacer defining the gate line position, and a protective layer. The film's thickness and formation process automatically define the gate line geometry without requiring additional resist alignment steps, making the process self-aligned.
Solution Approach 2:
The gate insulating film performs multiple functions simultaneously: electrical insulation, mechanical spacing for gate line definition, and process alignment reference. This multi-functionality eliminates the need for separate resist alignment steps, reducing process complexity while maintaining ease of manufacture.
3Reliability
If metal is used for gate electrodes, then gate electrode performance is improved, but a self-aligned process with thin gate material has not been achieved
Solution Approach 1:
The gate electrode is formed as a composite structure with metal providing electrical performance and polysilicon providing structural integrity and self-aligned definition. The gate insulating film enables this composite structure to be formed in a self-aligned manner, combining the benefits of metal electrodes with simplified processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for high integration density, reduces resistance through direct silicide-metal film contact, and prevents short circuits even with misaligned resist formation, enabling efficient production of SGTs with a high degree of integration.
Implementation Method 1
forming a gate insulating film around each of the first pillar-shaped silicon layer and second pillar-shaped silicon layer
Implementation Method 2
forming a metal film and a polysilicon film around the gate insulating film
Implementation Method 3
forming the gate line by performing anisotropic etching
Implementation Method 4
removing the exposed portion of the polysilicon film by etching
Data Source
AI summary
A method for producing a semiconductor device includes a first step including forming a planar silicon layer and forming first and second pillar-shaped silicon layers; a second step including forming a gate insulating film around each of the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, the thickness of the polysilicon film being smaller than half of a distance between the first and second pillar-shaped silicon layers, forming a third resist, and forming a gate line; and a third step including depositing a fourth resist so that a portion of the polysilicon film on an upper side wall of each of the first and second pillar-shaped silicon layers is exposed, removing the exposed portion of the polysilicon film, removing the fourth resist, and removing the metal film to form first and second gate electrodes.