SHA2 Instruction Processor Packed Data Registers

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Solution Overview

Problem

Conventional implementations of SHA2 hash algorithms are computationally intensive due to the large number of instructions required for each round, making them time-consuming and inefficient.

Innovation Solution

The development of specialized instructions and processor architecture that allow for the execution of SHA2 hash algorithms using fewer instructions, such as updating four state data elements with a single instruction and utilizing packed data registers to reduce the number of operations needed, thereby improving efficiency and speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional implementations of SHA2 hash algorithms are used, then the algorithms can be executed on general-purpose processors, but the computational intensity is high and execution time is long

Engineering Contradiction:
Improveexecution speedVSAvoidcomputational intensity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the SHA2 algorithm implementation by introducing dedicated instruction sequences that break down the complex hash computation into manageable operational units. These segmented instructions optimize specific operations within the hash algorithm, reducing overall computational intensity while maintaining execution accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces the mechanical execution of SHA2 algorithms on general-purpose processors with specialized instruction sets designed specifically for hash computation. This substitution optimizes the computational mechanism by leveraging processor features and instruction optimizations tailored for cryptographic operations, thereby reducing computational overhead and improving execution speed.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If conventional instruction sequences are used for SHA2 algorithms, then implementation is straightforward on existing processors, but the number of instructions required is large

Engineering Contradiction:
Improveinstruction efficiencyVSAvoidexecution time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent merges multiple sequential instructions required for SHA2 computation into optimized instruction sequences. By combining related operations and leveraging processor capabilities, the patent reduces the total instruction count while maintaining the functional correctness of the hash algorithm, thereby improving instruction efficiency and reducing execution time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements preliminary actions by pre-computing and caching intermediate values required for SHA2 algorithm execution. This approach prepares data in advance, reducing the number of instructions needed during actual hash computation and minimizing execution time while maintaining implementation simplicity.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If SHA2 algorithms are implemented with high computational intensity, then security requirements are met, but the algorithms are not suitable for low-cost and mobile devices

Engineering Contradiction:
ImprovesecurityVSAvoidenergy efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by optimizing specific portions of the SHA2 algorithm implementation rather than uniformly processing all operations. By identifying and optimizing critical computational paths while maintaining standard processing for other operations, the patent achieves secure hash computation with reduced energy consumption, making the algorithm suitable for mobile and low-cost devices without compromising security.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10911222B2Instructions processors, methods, and systems to process secure hash algorithms
Publication Date: 2021.02.02 INTEL CORP
  • US10911222B2 patent drawing
  • US10911222B2 patent drawing
  • US10911222B2 patent drawing

AI summary

A method of an aspect includes receiving an instruction. The instruction indicates a first source of a first packed data including state data elements ai, bi, ei, and fi for a current round (i) of a secure hash algorithm 2 (SHA2) hash algorithm. The instruction indicates a second source of a second packed data. The first packed data has a width in bits that is less than a combined width in bits of eight state data elements ai, bi, ci, di, ei, fi, gi, hi of the SHA2 hash algorithm. The method also includes storing a result in a destination indicated by the instruction in response to the instruction. The result includes updated state data elements ai+, bi+, ei+, and fi+ that have been updated from the corresponding state data elements ai, bi, ei, and fi by at least one round of the SHA2 hash algorithm.