SHA-2 Sigma Function Acceleration in General Purpose Processors
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Solution Overview
Problem
Existing hardware-accelerated SHA algorithms are costly and difficult to implement fully pipelined, limiting throughput and thread simultaneous usage due to the complexity of the SHA algorithm's 8 internal 32-bit or 64-bit states, making efficient checksum calculation challenging in cloud computing and RAS environments.
Innovation Solution
A general-purpose processor with an integrated circuit designed to calculate SHA-2 sigma functions as processor instructions, allowing for in-core acceleration of the SHA-2 hash function, reducing hardware requirements and enabling faster calculations by performing sigma functions within a single instruction cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fully pipelined hardware is built to perform the whole SHA algorithm, then throughput is improved, but device complexity and manufacturing difficulty increase significantly
Solution Approach 1:
The patent segments the SHA-2 algorithm into two parts: the complex sigma functions are implemented in specialized hardware, while the simpler hash function components are executed in general-purpose processors. This segmentation allows the hardware to focus on performance-critical operations without needing to implement the entire algorithm, reducing overall device complexity while maintaining high throughput.
Solution Approach 2:
The patent extracts the most computationally intensive sigma functions from the complete SHA-2 algorithm and implements them in dedicated hardware units. By taking out only the complex portions and leaving the simpler components for general-purpose processing, the system achieves high throughput without requiring fully pipelined hardware for the entire algorithm.
2Speed
If specialized hardware is used for SHA algorithm, then calculation speed is improved, but hardware cost and implementation difficulty increase
Solution Approach 1:
The patent divides the SHA-2 implementation into specialized hardware for sigma functions and general-purpose processors for hash function execution. This segmentation enables high calculation speed for the critical sigma functions while avoiding the need to implement the entire SHA algorithm in specialized hardware, thereby reducing implementation difficulty and cost.
Solution Approach 2:
The patent makes general-purpose processors serve dual purposes: executing the hash function components and potentially executing sigma functions when needed. This multi-functionality reduces the need for dedicated hardware for all SHA operations, lowering implementation difficulty and cost while maintaining high speed for critical operations.
3Productivity
If SHA algorithm is implemented in specialized hardware, then calculation efficiency is improved, but adaptability to multiple threads is reduced
Solution Approach 1:
The patent segments the SHA-2 algorithm execution between specialized hardware (for sigma functions) and general-purpose processors (for hash function and coordination). This segmentation allows multiple threads to share the general-purpose processor resources while utilizing specialized hardware acceleration, thereby maintaining calculation efficiency while improving adaptability to multi-threaded environments.
Solution Approach 2:
The patent enables general-purpose processors to handle multiple SHA-2 related tasks including hash function execution, sigma function coordination, and multi-thread synchronization. This universal approach allows the same hardware to serve multiple threading needs, improving adaptability while maintaining efficiency through specialized hardware acceleration for critical operations.
Data Source
AI summary
Various systems, apparatuses, processes, and/or products may be used to calculate an SHA-2 hash function in a general-purpose processor. In some implementations, a system, apparatus, process, and/or product may include the ability to calculate at least one SHA-2 sigma function by using an execution unit adapted for performing a processor instruction, the execution unit including an integrated circuit primarily designed for calculating the SHA-2 sigma function(s), and calculating the SHA-2 hash function with general-purpose hardware processing components of the processor based on the sigma function(s). In certain implementations, the calculation of the SHA-2 sigma function(s) can be performed by the integrated circuit within a single instruction, allowing for a faster calculation of the SHA-2 hash function.