Pseudorandom Number Generation via SHA-512 Hash Circuit
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Solution Overview
Problem
Existing pseudorandom number generation methods lack efficiency and flexibility in generating high-quality pseudorandom numbers for various applications, particularly in computing environments, as they often rely on outdated algorithms and do not meet modern security standards.
Innovation Solution
A machine instruction, referred to as the Perform Pseudorandom Number Operation, is introduced, which uses a 512-bit secure hash algorithm (SHA-512) to generate pseudorandom numbers, allowing for instantiation and reseeding of seed values, and operates in a right-to-left manner for performance optimization, while being extendable to alternate encoding algorithms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If library subroutines or limited processor functions are used to generate pseudorandom numbers, then the implementation is simple and widely compatible, but the security quality and randomness strength are insufficient for modern applications
Solution Approach 1:
The patent replaces traditional software library subroutines and simple processor functions with a hardware-based pseudorandom number generation mechanism embedded in the processor. This hardware implementation uses dedicated circuits (such as ring oscillators, carry chains, or other physical phenomena) to generate pseudorandom numbers, providing higher security quality and reliability while maintaining processor integration. The hardware-based approach ensures that the generation mechanism cannot be easily replicated or predicted, meeting modern cryptographic requirements.
2Adaptability or versatility
If deterministic pseudorandom number generation is used, then the sequence can be reproduced given a seed value, but the flexibility to adapt to different applications and security requirements is limited
Solution Approach 1:
The patent implements a dynamic pseudorandom number generation system where the processor can selectively activate different generation modes based on application requirements. The system includes controllable elements (such as switches or configuration registers) that allow the processor to adjust the generation rate, seed update frequency, and algorithm complexity in real-time. This dynamic adaptation enables the same hardware mechanism to serve both high-security cryptographic applications requiring slow, carefully-controlled generation and general-purpose applications requiring faster generation, thereby improving versatility without sacrificing generation speed.
Data Source
AI summary
A machine instruction is provided that includes an opcode field to provide an opcode, the opcode to identify a perform pseudorandom number operation, and a register field to be used to identify a register, the register to specify a location in memory of a first operand to be used. The machine instruction is executed, and execution includes for each block of memory of one or more blocks of memory of the first operand, generating a hash value using a 512 bit secure hash technique and at least one seed value of a parameter block of the machine instruction; and storing at least a portion of the generated hash value in a corresponding block of memory of the first operand, the generated hash value being at least a portion of a pseudorandom number.