Upstream Shader Attribute Storage for Graphics Pipeline Throughput

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Solution Overview

Problem

Conventional graphics processing pipelines face reduced processing throughput and performance due to the limited capacity of FIFO buffer circuits, which is exacerbated by the increased amount of attribute data generated and passed through the pipeline as graphics processing capabilities improve and primitive sizes decrease.

Innovation Solution

The system involves storing attribute structures in memory by upstream shader units for downstream access, allowing delayed generation of attributes and reducing the amount of data passed through the pipeline, with memory allocation and deallocation managed by shader programs to optimize storage and processing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the number of attributes generated per vertex is increased to improve graphics processing capabilities, then the quality and detail of graphics processing is improved, but the capacity of FIFO buffer circuits is exceeded resulting in reduced processing throughput

Engineering Contradiction:
Improvegraphics processing qualityVSAvoidprocessing throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent segments the attribute data handling by separating the generation of attributes at different levels of geometric representation. Instead of passing all attributes through FIFO buffers at each pipeline stage, the system generates attributes only when needed at specific representation levels, dividing the data flow into manageable segments that don't overwhelm buffer capacities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by pre-calculating and storing attributes in memory during the geometry processing stage before rasterization. This allows attributes to be prepared in advance and stored efficiently, eliminating the need for large FIFO buffers to hold all attributes during pipeline transmission.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the size of primitives is decreased to improve graphics processing capabilities, then the detail and resolution of the rendered image is improved, but the amount of attribute data passed through the pipeline increases significantly

Engineering Contradiction:
Improveimage resolutionVSAvoidattribute data volume
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent applies local quality by generating attributes selectively based on the specific representation level being processed. Instead of uniformly generating all possible attributes for all primitives, the system generates attributes locally at each representation level only when needed for that specific level's processing requirements.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces a new dimension to attribute handling by organizing attributes according to representation levels rather than passing them sequentially through pipeline stages. This dimensional reorganization allows attributes to be stored and retrieved based on their associated geometric representation level, reducing redundant data transmission.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If FIFO buffer circuit capacity is increased to handle more attribute data, then the processing throughput is maintained, but the device complexity and resource usage increase

Engineering Contradiction:
Improveprocessing throughputVSAvoidbuffer circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces memory as an intermediary between the geometry processing stage and the rasterization stage. Instead of relying on large FIFO buffers to hold all attributes, the memory system serves as an intermediary storage medium where attributes are stored by their representation level and retrieved as needed, reducing the buffer capacity requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the parameter of attribute storage from fixed FIFO buffer capacity to dynamic memory allocation based on representation levels. This parameter change allows the system to adapt memory usage to actual needs rather than provisioning for maximum possible data volume, reducing overall device complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9659399B2System, method, and computer program product for passing attribute structures between shader stages in a graphics pipeline
Publication Date: 2017.05.23 NVIDIA CORP
  • US9659399B2 patent drawing
  • US9659399B2 patent drawing
  • US9659399B2 patent drawing

AI summary

A system, method, and computer program product are provided for passing attribute structures between shader stages of a processing pipeline. The method includes the steps of receiving data represented at a first level by a processing pipeline including an upstream shader unit, a downstream shader unit, and a processing unit. The upstream shader unit processes the data to generate a first set of attributes corresponding to the data represented at a second level. The upstream shader unit also stores the first set of the attributes in a first portion of a memory system that can be read by the downstream shader unit and any shader units that are downstream in the processing pipeline relative to the upstream shader unit. In one embodiment, the processing unit is coupled between the upstream shader unit and the downstream shader unit.