Shadow Memory for Dynamic Translation Overhead

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Solution Overview

Problem

Dynamic translation systems face inefficiencies due to the time required to translate non-native instructions into native instructions during runtime, as they involve retrieval and parsing of instructions, which can lead to overhead in decoding processes.

Innovation Solution

A method and system utilizing a shadow memory to store precompiled code fragments corresponding to non-native instructions, allowing for direct execution from the shadow memory during subsequent passes, thereby reducing the need for repeated parsing and interpretation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If dynamic translation is used to translate non-native instructions to native instructions during runtime, then the system can execute non-native code without pre-compilation, but the translation time and overhead increase significantly

Engineering Contradiction:
Improveability to execute non-native codeVSAvoidtranslation time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent pre-generates instruction codes for non-native instructions during a first pass before execution. These instruction codes are stored in shadow memory for rapid retrieval during subsequent executions, eliminating the need for repeated parsing and translation of the same non-native instructions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates simplified copies of non-native instructions in the form of instruction codes that are stored in shadow memory. These copies contain only the essential information needed for execution (opcode and operand locations) without the full parsing overhead of the original non-native instructions.

Inventive Principle:
Principle #26Copying

2Productivity

If instruction parsing is performed during runtime translation, then the correct code sequence can be selected, but the decoding overhead increases execution time

Engineering Contradiction:
Improvecode selection accuracyVSAvoiddecoding complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts only the essential components of non-native instructions (opcode and operand locations) into simplified instruction codes during a preliminary pass. This extraction eliminates the need for complex real-time parsing during execution, as the shadow memory contains pre-processed instruction representations.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If the same non-native instructions are executed multiple times, then the translation process repeats, but this leads to redundant parsing and interpretation overhead

Engineering Contradiction:
Improverepeated execution capabilityVSAvoidexecution efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent performs the translation and code generation in advance during a first pass, storing the results in shadow memory. When the same non-native instructions are executed again, the pre-generated instruction codes are retrieved from shadow memory without repeating the parsing and translation process, significantly improving repeated execution efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent discards the redundant parsing and interpretation steps for repeatedly executed instructions by recovering the pre-generated instruction codes from shadow memory. This allows the system to skip the time-consuming translation process and directly execute the recovered instruction codes.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS9201635B2Just-in-time dynamic translation for translation, compilation, and execution of non-native instructions
Publication Date: 2015.12.01 UNISYS CORP
  • US9201635B2 patent drawing
  • US9201635B2 patent drawing
  • US9201635B2 patent drawing

AI summary

A method for executing non-native instructions in a computing system having a processor configured to execute native instructions may include fetching a first non-native instruction from a plurality of non-native instructions; interpreting the first non-native instruction to generate a first instruction code; compiling the first instruction code to generate a first native instruction corresponding to the first non-native instruction; determining whether to execute the first instruction code or the generated first native instruction; and implementing a first virtual machine instruction corresponding to the first non-native instruction based, at least in part, on determining whether to execute the first instruction code or the first native instruction.