Shadow Memory for Real-Time Invalid Reference Detection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current debugging techniques are inefficient in diagnosing and addressing invalid memory references due to lack of information and insufficient granularity, particularly in complex environments like integrated database applications, leading to increased software development time and reduced application stability.

Innovation Solution

A method and system that allocates shared memory with a shadow memory to track accesses, using a counter to detect intermittent increments indicating invalid memory references, allowing real-time identification and termination of rogue processes before further errors occur.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional debugging techniques are used to log errors during execution, then errors can be recorded, but the errors can be overwritten or lost when the application continues processing, increasing software development time

Engineering Contradiction:
Improveerror detection reliabilityVSAvoidsoftware development time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by proactively detecting invalid memory references before they can be overwritten or lost during application processing. The shadow memory system continuously monitors and records memory access patterns in advance, ensuring error information is preserved immediately when it occurs, rather than waiting for traditional logging which may lose data when processing continues.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If traditional debugging techniques view errors from the perspective of a general operating system, then errors can be detected, but insufficient granularity is provided for complex environments like integrated database applications

Engineering Contradiction:
Improveerror detection granularityVSAvoiddebugging system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the debugging system into distinct components: a shadow memory system that operates independently from the main application memory, and a debug analyzer that separately processes memory access information. This segmentation allows the system to provide fine-grained detection of invalid memory references in complex environments without overwhelming the overall system complexity, as each component has a specific, manageable function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses an intermediary approach by introducing a shadow memory as a mediator between the application's shared memory and the debug analyzer. The shadow memory intercepts and records memory access patterns without interfering with the actual application execution, providing detailed granularity for complex environments while isolating the debugging complexity from the application itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If shared memory is allocated to processes without tracking, then memory allocation is simple, but invalid memory references cannot be detected in real-time

Engineering Contradiction:
Improvememory access validityVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies copying by creating a shadow memory that is a duplicate or mirror of the shared memory structure. This shadow copy tracks memory access patterns and validity information without modifying the original shared memory allocation process. The copying approach allows real-time detection of invalid references while keeping the original memory management simple and unchanged.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8516450B2Detecting real-time invalid memory references
Publication Date: 2013.08.20 ORACLE INT CORP
  • US8516450B2 patent drawing
  • US8516450B2 patent drawing
  • US8516450B2 patent drawing

AI summary

A method, system, and computer program product for identifying invalid memory references. In one embodiment, invalid memory references are identified as they occur. In another embodiment, the invalid memory references are identified within a customized operating system that runs within an application.