Shadow Register Load State Restoration for LOC Power Reduction
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Solution Overview
Problem
Current methods for launch and capture power reduction in launch-off-capture (LOC) testing of Very Large Scale Integrated (VLSI) circuits face challenges in minimizing power dissipation while maintaining pattern count and defect coverage, often resulting in excessive switching activity and yield loss due to elevated peak power and IR drop issues.
Innovation Solution
A system and method that utilize design partitioning and load state restoration techniques to reduce launch and capture power by testing one region at a time, employing strongly-connected-components (SCCs) to identify and partition the design, and using shadow registers to restore the load state of interface registers between test operations, thereby minimizing test time and data volume.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If serial shift operations are performed during scan testing, then test patterns can be loaded into scan chains, but excessive switching activity occurs in scan chains propagating into combinational logic resulting in elevated peak power and IR drop
Solution Approach 1:
The design is partitioned into multiple regions, and scan chains are divided into region-specific segments. During testing, only the scan chains corresponding to the active region are shifted, while other scan chains remain static. This segmentation of the testing process eliminates excessive switching activity in inactive regions, thereby reducing peak power consumption and IR drop effects.
2Power
If design partitioning is implemented to reduce launch and capture power, then peak power consumption decreases, but test time and data volume increase
Solution Approach 1:
Load state restoration logic is pre-configured in the interface registers before testing begins. This logic automatically restores the load state of interface registers between testing different regions, eliminating the need for manual reconfiguration. The preliminary setup of restoration mechanisms enables rapid transition between regions, reducing overall test time while maintaining power reduction benefits.
3Power
If interface registers are used for region partitioning, then launch and capture operations can be performed on specific regions, but area cost increases due to additional registers
Solution Approach 1:
Interface registers are designed to serve multiple functions: they act as both functional registers for normal operation and as region partitioning boundaries during testing. The same interface registers that connect different functional blocks are utilized to define region boundaries, eliminating the need for dedicated test-only registers. This multi-functionality approach achieves region-specific testing capability without additional area cost.
4Loss of energy
If load state restoration is implemented in interface registers, then switching activity is reduced between test operations, but device complexity increases
Solution Approach 1:
The interface registers are equipped with self-restoring capability through integrated load state restoration logic. When transitioning between regions, the restoration logic automatically detects which interface registers need state restoration and performs the restoration without external intervention. This self-service mechanism reduces switching activity and energy loss while keeping the added complexity localized and manageable within the register structure itself.
Data Source
AI summary
Exemplary system, method and computer accessible medium that can transform a circuit by selecting at least one scan cell as an interface register and inserting a shadow register into each interface register. Operations can be shifted to load and unload at least one scan cell in the circuit. An operation can be launched in at least one of the interface registers and in a first set of scan cells. A capture operation can be performed in a second set of scan cells. An operation can be restored in at least one interface register by transferring data from at least one shadow register.