Array Substrate Electrode Structure for Shallow Via Fingerprint Sensing
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Solution Overview
Problem
The integration of optical fingerprint technology with liquid crystal display panels is hindered by the need for optical sensors on array substrates, which increases process risks and reduces stability due to deeper via depths in exposure and etching processes.
Innovation Solution
The design of an array substrate with a PIN diode and specific layer configurations, including a third metal layer with a first electrode connected through a first via, a second conductive layer covering the PIN diode, and a second via for the second electrode, reduces the depth of connection holes and enhances manufacturing stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If optical sensors are fabricated on array substrate, then optical fingerprint technology can be applied to liquid crystal display panels, but the via depth increases causing process risk and reducing stability
Solution Approach 1:
The patent divides the connection structure into multiple segments: upper conductive layer, first via, first conductive layer, second via, and lower conductive layer. This segmentation allows each via to be shallower while maintaining overall electrical connection, reducing process risk in exposure and etching while enabling optical sensor fabrication on array substrate
Solution Approach 2:
The patent introduces intermediate conductive layers and insulating layers between the upper and lower conductive layers. These intermediary structures act as mediators to bridge the connection while controlling via depth, reducing process difficulty and improving optical sensor stability without preventing optical fingerprint technology application
2Adaptability or versatility
If optical sensors are fabricated on array substrate, then optical fingerprint technology can be applied to liquid crystal display panels, but the via depth increases causing process risk in exposure and etching
Solution Approach 1:
The patent segments the deep via connection into multiple shallower vias separated by conductive and insulating layers. This segmentation reduces the depth of each individual via, making exposure and etching processes safer and more controllable while still enabling optical sensor fabrication on array substrate
Solution Approach 2:
The patent transitions from a single deep vertical via to a multi-layer stacked structure with both vertical and lateral dimensions. By adding intermediate layers and distributing the connection across multiple levels, the structure reduces vertical via depth while maintaining electrical connectivity, thereby reducing process risk
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces process risks and improves the stability and feasibility of the manufacturing process, leading to enhanced optical sensor stability and accuracy in fingerprint recognition.
Implementation Method 1
use a difference in an intensity of light reflected by valleys and ridges of a fingerprint into a sensing area of the display panel to convert different optical signals into electrical signals
Data Source
AI summary
An array substrate, a display panel, and an electronic device are provided. The array substrate includes a substrate, a first conductive layer including a first connection part, a fourth insulating layer disposed on the first conductive layer and provided with a second via, and a second conductive layer disposed on the fourth insulating layer and in the second via. The second conductive layer includes a second electrode, and the second electrode is connected to the first connection part through the second via.


