Shaped Metal Edge Geometry for High-Voltage IC Isolation

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Solution Overview

Problem

The maximum operating voltage of integrated circuits (ICs) with closely spaced conductive lines is limited by the onset of electric discharge due to high electric field magnitudes near sharp corners of conductive lines.

Innovation Solution

The shape of conductive lines in ICs is tailored to reduce the maximum electric field by incorporating electric field-reducing structures such as rounded corners, curved side surfaces, sloped side surfaces, and stepped side surfaces, with radii of curvature greater than 1 micron.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive lines with sharp corners are used, then manufacturing is simpler, but electric discharge occurs at high voltages due to high electric field magnitudes

Engineering Contradiction:
Improveelectric discharge preventionVSAvoidconductive line fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies curvature by rounding the corners of conductive lines with a radius of curvature greater than 1 micron. This spherical/curved geometry reduces electric field concentration at sharp edges, preventing electric discharge while maintaining manufacturing feasibility through standard lithographic processes that can achieve such rounded corners.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent changes the geometric parameter of the conductive line corners from sharp (zero radius) to rounded (radius > 1 micron). This parameter modification directly reduces the maximum electric field magnitude, allowing operation at higher voltages without discharge, while remaining compatible with existing fabrication capabilities.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If conductive lines are closely spaced to increase integration density, then device functionality is improved, but electric discharge risk increases due to high electric field magnitudes

Engineering Contradiction:
Improveintegration densityVSAvoidelectric discharge prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By rounding the corners of closely spaced conductive lines, the patent reduces electric field concentration at each line's corners. This allows lines to be placed closer together without increasing discharge risk, thereby enabling higher integration density while maintaining reliability.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent applies different geometric qualities to different parts of the conductive lines - specifically rounding only the corners while maintaining straight segments between them. This localized modification targets the specific areas (corners) where electric field concentration occurs, allowing close spacing without compromising reliability.

Inventive Principle:
Principle #3Local quality

3Reliability

If rounded corners with radius greater than 1 micron are used, then operating voltage is increased, but manufacturing precision requirements are heightened

Engineering Contradiction:
Improveoperating voltageVSAvoidcorner radius control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent specifies a minimum radius of curvature greater than 1 micron, which is a relaxed parameter compared to typical lithographic features. This parameter choice balances the need for electric field reduction with the capabilities of standard manufacturing processes, avoiding excessive precision requirements while achieving the desired voltage increase.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250194116A1Shaped metal edge for galvanic or capacitive isolator
Publication Date: 2025.06.12 ANALOG DEVICES INT UNLTD CO
  • US20250194116A1 patent drawing
  • US20250194116A1 patent drawing
  • US20250194116A1 patent drawing

AI summary

The disclosed technology generally relates to lithographically defined conductive lines for integrated circuit devices formed by plating, and more particularly to conductive lines shaped to reduce the magnitude of electric field in the electric field distributions around conductive lines of integrated and monolithic transformers and isolators.