Shaped Metal Silicide on Elevated Source Drain Regions
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Solution Overview
Problem
As semiconductor devices approach 20 nm integration density, the interfacial resistance between metal silicide and silicon becomes a dominant parasitic resistance component, necessitating reduced interfacial resistance and increased interface area for improved performance.
Innovation Solution
A method of forming semiconductor devices using pre-amorphization implants (PAI) to create an amorphized portion in the elevated source/drain region, followed by forming metal silicide with a curved lower profile that extends above the gate oxide layer, enhancing the contact area and reducing interfacial resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the integration density is scaled to 20 nm or less, then the device performance is improved, but the interfacial resistance between metal silicide and silicon becomes a dominant parasitic resistance component
Solution Approach 1:
The patent transitions from a planar interface to a three-dimensional curved interface by forming the metal silicide with a curved lower profile that extends into the elevated source/drain region. This dimensional change increases the contact area between metal silicide and silicon, thereby reducing interfacial resistance while maintaining high integration density
Solution Approach 2:
The patent employs curvature by forming the metal silicide with a curved lower profile rather than a flat interface. The curved surface increases the interfacial contact area between the metal silicide and the silicon substrate, effectively reducing parasitic resistance at the interface
2Reliability
If the interface area between metal silicide and silicon is increased, then the interfacial resistance is reduced, but the device structure becomes more complex
Solution Approach 1:
The patent performs pre-amorphization implantation into the elevated source/drain region before forming the metal silicide. This preliminary action prepares the silicon substrate by creating an amorphized portion that facilitates subsequent metal silicide formation and ensures good interfacial contact, thereby reducing resistance without requiring complex post-processing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces interfacial resistance and promotes current flow by creating a wider contact area between the metal silicide and the elevated source/drain region, improving the performance of semiconductor devices.
Implementation Method 1
A pre-amorphization implant (PAI) may be performed into the elevated source/drain region, through the opening, to form an amorphized portion of the elevated source/drain region
Implementation Method 2
A metal-silicide can be formed from a metal and the amorphized portion
Implementation Method 3
forming the metal-silicide can be provided by forming the metal-silicide to include a silicide lower profile
Data Source
AI summary
A method of forming a semiconductor device can be provided by forming an opening that exposes a surface of an elevated source/drain region. The size of the opening can be reduced and a pre-amorphization implant (PAI) can be performed into the elevated source/drain region, through the opening, to form an amorphized portion of the elevated source/drain region. A metal-silicide can be formed from a metal and the amorphized portion.