Shared ADC for CMOS Image Sensor Power and Area Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS image sensors face challenges with high power consumption and chip area burden due to the large number of analog-to-digital converters (ADCs) required for each column line, leading to noise issues from simultaneous current peaks during ADC operations.
Innovation Solution
An image sensor design incorporating a correlated double sampler and a shared analog-to-digital converter that converts correlated double sampling signals from multiple columns using a global code, with a column shared operator performing digital conversion operations in a time-division manner, reducing chip area and power consumption by dispersing digital conversion operations across columns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If an ADC circuit is provided for every column line of the pixel array, then analog signals from all columns can be converted to digital signals simultaneously, but power consumption and chip area increase significantly
Solution Approach 1:
Multiple ADC circuits that were previously distributed for each column are merged into a single shared ADC circuit. This single ADC circuit processes analog signals from multiple columns sequentially, reducing the total number of ADC circuits from N (where N is the number of columns) to just one, thereby significantly reducing power consumption and chip area while maintaining the capability to convert analog signals to digital signals for all columns.
Solution Approach 2:
The system transitions from a static configuration where each column has a dedicated ADC circuit to a dynamic configuration where a single ADC circuit shares the processing task across multiple columns in a time-division manner. This dynamic sharing allows the same hardware resource to serve multiple purposes at different times, reducing the overall hardware footprint and power requirements while maintaining full functional capability.
2Productivity
If an ADC circuit is provided for every column line of the pixel array, then analog signals from all columns can be converted to digital signals simultaneously, but chip area increases significantly
Solution Approach 1:
Multiple ADC circuits that were previously distributed for each column are merged into a single shared ADC circuit. This single ADC circuit processes analog signals from multiple columns sequentially, reducing the total number of ADC circuits from N (where N is the number of columns) to just one, thereby significantly reducing power consumption and chip area while maintaining the capability to convert analog signals to digital signals for all columns.
Solution Approach 2:
The system transitions from a static configuration where each column has a dedicated ADC circuit to a dynamic configuration where a single ADC circuit shares the processing task across multiple columns in a time-division manner. This dynamic sharing allows the same hardware resource to serve multiple purposes at different times, reducing the overall hardware footprint and power requirements while maintaining full functional capability.
3Productivity
If ADC operations are performed simultaneously at respective columns, then all columns are processed in parallel, but current peaks occur that act as noise in the image sensor
Solution Approach 1:
The system transitions from a static configuration where each column has a dedicated ADC circuit to a dynamic configuration where a single ADC circuit shares the processing task across multiple columns in a time-division manner. This dynamic sharing allows the same hardware resource to serve multiple purposes at different times, reducing the overall hardware footprint and power requirements while maintaining full functional capability.
Solution Approach 2:
The single shared ADC circuit processes columns in a periodic, sequential manner rather than simultaneously. By dividing the processing into time-division cycles where different columns are processed in turn, the system avoids the simultaneous current peaks that would occur with parallel processing. This periodic sequential processing maintains productivity while eliminating the harmful current peaks that cause noise.
Data Source
AI summary
An image sensor is provided. The image sensor includes a pixel array having active pixel sensors arranged in rows and columns; a correlated double sampler that converts sensing signals transferred from pixels sensors selected from the active pixel sensors to correlated double sampling signals and outputs a conversion result by column; and an analog-to-digital converter that converts the correlated double sampling signals corresponding to plural columns to digital signals using a global code. The analog-to-digital converter includes a column shared operator that performs a digital conversion operation on correlated double sampling signals corresponding to two or more columns of the plural columns.


