Semiconductor Pattern Transfer Using Shared Alignment Marks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing lithography processes face inefficiencies in aligning patterns on semiconductor wafers due to the need for multiple alignment marks, leading to wasted space and inefficient layout design.

Innovation Solution

A pattern forming method that utilizes a pattern forming apparatus with a template and alignment unit to align and transfer patterns efficiently, using a common alignment mark and minimizing the need for additional marks by covering existing marks with additional resist, thereby optimizing the layout.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple alignment marks are used for pattern alignment, then alignment accuracy is improved, but the area occupied by alignment marks increases and layout efficiency deteriorates

Engineering Contradiction:
Improvealignment accuracyVSAvoidarea occupied by alignment marks
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges the alignment mark function with the template structure by providing alignment marks directly on the template that will be transferred to the substrate. This eliminates the need for separate alignment marks on the substrate, combining two functions (alignment reference and pattern transfer) into a single integrated system, thereby reducing the total area occupied by alignment features while maintaining alignment accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The template serves multiple functions: it acts as both the pattern transfer medium and the alignment reference carrier. The alignment marks on the template serve dual purposes - enabling precise alignment during the imprinting process and simultaneously being transferred as part of the final pattern on the substrate, thus eliminating redundant alignment structures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If additional resist is applied to cover alignment marks, then the alignment mark function is maintained with fewer marks, but the process complexity increases

Engineering Contradiction:
Improvearea occupied by alignment marksVSAvoidprocess complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The additional resist is applied in advance during the same coating step as the main resist, before the imprinting process begins. This preliminary application ensures that when the template is pressed onto the substrate, the alignment marks are already covered and will be transferred along with the main pattern, simplifying the overall process by combining multiple coating operations into one.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The additional resist automatically covers the alignment marks during the normal resist coating process without requiring separate alignment mark protection steps. The system uses the existing resist application mechanism to accomplish the dual task of coating the main area and protecting the alignment marks, thereby reducing process complexity.

Inventive Principle:
Principle #25Self-service

3Productivity

If alignment marks are minimized, then layout efficiency is improved, but alignment precision may deteriorate

Engineering Contradiction:
Improvelayout efficiencyVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The alignment marks are copied from the template to the substrate during the imprinting process. By transferring the alignment marks along with the main pattern using the same template contact, the system ensures that the copied alignment marks maintain the same precision as the original template features, achieving high alignment precision with minimal mark usage.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12564020B2Pattern forming method, semiconductor device manufacturing method, and pattern forming apparatus
Publication Date: 2026.02.24 KIOXIA CORP
  • US12564020B2 patent drawing
  • US12564020B2 patent drawing
  • US12564020B2 patent drawing

AI summary

According to one embodiment, a pattern forming method includes forming a first resin pattern on a substrate with a first resin. The first resin pattern includes a first transfer pattern and a first mark. A second resin is dispensed to cover the first mark of the first resin pattern. A first pattern is formed including the first transfer pattern and the second resin covering the first mark. The first pattern is then transferred to a first process film on the substrate.