Shared Arithmetic Circuit Arbitration for Programmable Controller Area Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional programmable controllers require multiple dedicated LSIs for arithmetic operations, leading to increased circuit complexity and area usage due to the need for separate arithmetic operation elements for each type of processing, which complicates parallel execution of sequence programs.
Innovation Solution
A signal processing circuit with a common arithmetic operation element shared among multiple sequence control units, utilizing an arbitration circuit to prioritize and manage requests, allowing efficient use of the shared resource and reducing circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If multiple dedicated LSIs with separate arithmetic operation elements are used for each type of arithmetic processing, then processing speed is improved, but circuit area increases
Solution Approach 1:
The patent merges multiple dedicated arithmetic operation elements into a single shared arithmetic operation element that can be accessed by multiple sequence control units. This consolidation reduces the total circuit area while maintaining parallel processing capability through time-multiplexed access controlled by an arbitration circuit.
Solution Approach 2:
The shared arithmetic operation element is designed to perform multiple types of arithmetic operations that were previously handled by separate dedicated elements. This universal element can service multiple sequence control units, reducing overall circuit complexity and area while maintaining functional versatility.
2Productivity
If multiple dedicated LSIs are mounted for parallel execution of sequence programs, then processing capability is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple dedicated LSI functions into a unified architecture where a single shared arithmetic operation element serves multiple sequence control units. This merging reduces device complexity by eliminating redundant components while preserving parallel processing throughput through arbitration-based resource allocation.
Solution Approach 2:
An arbitration circuit is introduced as an intermediary component that manages access to the shared arithmetic operation element. This mediator coordinates requests from multiple sequence control units, enabling parallel processing without the complexity of multiple dedicated elements, thus simplifying the overall device architecture.
3Reliability
If separate arithmetic operation elements are used for each sequence control unit, then reliability is improved, but circuit area increases
Solution Approach 1:
The arbitration circuit acts as a mediator that ensures fair and controlled access to the shared arithmetic operation element for multiple sequence control units. This intermediary mechanism maintains system reliability by preventing conflicts and ensuring that each unit can reliably execute its arithmetic operations without interference, while the shared element reduces circuit area.
Data Source
AI summary
Provided is a signal processing circuit occupying a small circuit area. A common arithmetic operation element is shared between a plurality of arithmetic operation sequence control units. An arbitration circuit selects, when the plurality of arithmetic operation sequence control units simultaneously generate requests for arithmetic operations to use the common arithmetic operation element, the predetermined sequence control unit based on priority information about the plurality of arithmetic operation sequence control units, causes the common arithmetic operation element to execute the arithmetic operation requested from the selected arithmetic operation sequence control unit, and returns the result of the arithmetic operation to the selected arithmetic operation sequence control unit.