Multi-Stage Power Amplifier With Shared Bias and Interstage Matching
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Solution Overview
Problem
Massive MIMO base stations face challenges in achieving high performance while meeting stringent size and power consumption requirements due to the complexity of large numbers of transceivers, particularly in achieving efficient power amplification across multiple stages.
Innovation Solution
A multiple-stage power amplifier configuration is implemented, featuring a driver stage transistor and a final stage transistor with different power densities, utilizing silicon-based and III-V semiconductor technologies respectively, and a shared drain bias voltage, along with an interstage impedance matching circuit, to enhance power transfer and gain flatness across the frequency band.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple-stage power amplifiers use different bias voltages for driver and final stages, then each stage can be optimized for its specific power density requirements, but the system complexity and power consumption increase due to requiring multiple bias voltage supplies
Solution Approach 1:
The patent merges the bias voltage supplies by connecting both the driver stage and final stage to the same drain bias voltage supply. This consolidation reduces the number of separate bias supplies from multiple to one, thereby reducing system complexity and power consumption while still allowing each stage to operate at its optimal power density through proper circuit design and impedance matching.
Solution Approach 2:
The single drain bias voltage supply serves multiple functions by providing bias voltage to both the driver stage and final stage simultaneously. This universal bias supply design eliminates the need for stage-specific bias supplies while maintaining the ability to optimize each stage's performance through the shared voltage reference.
2Power
If multiple-stage power amplifiers use different bias voltages for driver and final stages, then each stage can be optimized for its specific power density requirements, but the power consumption increases due to multiple bias voltage supplies
Solution Approach 1:
The patent merges the bias voltage supplies by connecting both the driver stage and final stage to the same drain bias voltage supply. This consolidation reduces the number of separate bias supplies from multiple to one, thereby reducing system complexity and power consumption while still allowing each stage to operate at its optimal power density through proper circuit design and impedance matching.
3Device complexity
If a single bias voltage is used for both driver and final stages, then the system complexity and power consumption are reduced, but the power density optimization between stages becomes more difficult
Solution Approach 1:
The patent applies local quality by designing the driver and final stages with different transistor technologies (silicon-based for driver, III-V semiconductor for final stage) and different power densities despite using the same bias voltage. This allows each stage to be locally optimized for its specific function while maintaining a unified bias supply architecture.
Solution Approach 2:
The patent changes key parameters including transistor technology type, power density ratio (1:2 to 1:8), and impedance values to enable both stages to operate optimally with a shared bias voltage. The interstage impedance matching circuit is specifically designed to accommodate these parameter differences and ensure proper power transfer.
4Ease of manufacture
If silicon-based transistors are used for both driver and final stages, then manufacturing is simplified, but the power density and efficiency of the final stage is insufficient
Solution Approach 1:
The patent uses composite materials by combining silicon-based transistors for the driver stage with III-V semiconductor transistors for the final stage. This composite approach leverages the manufacturing maturity of silicon while utilizing the superior power density characteristics of III-V semiconductors in the high-power final stage, achieving both manufacturability and high performance.
Solution Approach 2:
The patent segments the amplifier into two distinct stages with different transistor technologies. The driver stage uses silicon-based transistors that are easier to manufacture, while the final stage uses III-V semiconductor transistors optimized for high power density. This segmentation allows each stage to use the most appropriate material for its specific requirements.
Data Source
AI summary
A multiple-stage amplifier includes a driver stage transistor characterized by a first power density, and a final stage transistor characterized by a second power density that is larger than the first power density. A first drain bias circuit is coupled to a first drain terminal of the driver stage transistor, and is configured to provide a first drain bias voltage to the first drain terminal. A second drain bias circuit is coupled to a second drain terminal of the final stage transistor, and is configured to provide a second drain bias voltage to the second drain terminal, where the second drain bias voltage equals the first drain bias voltage. An interstage impedance matching circuit is coupled between the first drain terminal and a gate terminal of the final stage transistor. The multiple-stage amplifier may be included in a Doherty power amplifier, a transceiver, and/or a transceiver array.