Shared BIST Architecture for Deterministic Memory Initialization

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Solution Overview

Problem

Automotive electronic systems face challenges in achieving deterministic memory initialization due to resource constraints, leading to potential corruption of memory data during boot-up, which can cause spurious errors in subsequent operations.

Innovation Solution

A system is implemented with a memory built-in self-test (MBIST) module and a logical built-in self-test (LBIST) module to initialize memory with a deterministic pattern, using shared built-in self-test (BIST) resources, including a pseudorandom sequence generated by a finite state machine, to ensure proper initialization and validation of memory and processor functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional counter-based hardware is used for deterministic memory initialization, then memory initialization reliability is improved, but device area and physical resources are consumed

Engineering Contradiction:
Improvememory initialization reliabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The BIST resources are designed to perform multiple functions: they can conduct built-in self-test operations on memory and logic components, and simultaneously perform deterministic memory initialization. This multi-functionality eliminates the need for separate dedicated initialization hardware, thereby achieving reliable deterministic initialization without consuming additional device area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If BIST resources are shared across multiple memories and processors, then device area is reduced, but initialization complexity increases

Engineering Contradiction:
Improvedevice areaVSAvoidinitialization complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The system enters a dedicated BIST mode before normal operation, where the state machine pre-configures the shared resources and establishes the initialization sequence. This preliminary setup phase simplifies the subsequent initialization operations by preparing the hardware state in advance, making the shared resource management more straightforward despite the multi-functional nature of the BIST resources.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260031171A1Architecture for deterministic memory initialization for automotive electronics
Publication Date: 2026.01.29 QUALCOMM INC
  • US20260031171A1 patent drawing
  • US20260031171A1 patent drawing
  • US20260031171A1 patent drawing

AI summary

Aspects of the disclosure are directed to deterministic memory initialization. In accordance with one aspect, the disclosure includes initializing a first current memory address in a plurality of memories to a first memory address using a plurality of shared built-in self-test (BIST) resources; writing a first deterministic pattern to a first memory data word specified by the first current memory address using the plurality of shared BIST resources; and incrementing the first current memory address to a first subsequent memory address using the plurality of shared BIST resources.