Shared Boost Capacitor for Selective Negative Bitline Write Assist
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Solution Overview
Problem
Memory devices, such as SRAM, face challenges in write operations due to manufacturing variations in transistors, especially at lower supply voltages, leading to write failures when transitioning between logical states.
Innovation Solution
A negative bitline write assist circuitry is introduced, which includes a shared boost capacitor and write assist circuits that selectively drive bitlines to a negative voltage during write operations, assisting in changing logical states and reducing the impact of transistor strength variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If write operations are performed at reduced supply voltages, then power consumption is reduced, but write reliability deteriorates due to transistor strength variations
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the bitline voltage to negative values during write operations. This voltage parameter modification compensates for transistor strength variations and enables reliable writing even at reduced supply voltages, resolving the contradiction between low power consumption and high write reliability.
Solution Approach 2:
The patent introduces a shared boost capacitor as an intermediary energy storage element that supplies the negative voltage needed for write assist. This intermediary component enables the write assist circuitry to operate effectively without requiring proportional increases in supply voltage, thus maintaining low power consumption while improving write reliability.
2Reliability
If write assist circuitry is added to improve write reliability, then write failures are reduced, but device complexity increases
Solution Approach 1:
The patent merges multiple write assist circuits that share a common boost capacitor, reducing the overall device complexity. Instead of having separate boost capacitors for each write assist circuit, the shared capacitor approach consolidates components while maintaining the ability to provide write assist to multiple columns simultaneously.
Solution Approach 2:
The shared boost capacitor serves multiple functions: it provides voltage boosting for multiple write assist circuits, acts as an energy storage element, and enables selective write assist operation across different columns. This multi-functionality reduces the need for dedicated components for each function, thereby reducing device complexity.
3Reliability
If multiple boost capacitors are used for each write assist circuit, then write reliability is improved, but area occupied by the device increases
Solution Approach 1:
The patent merges multiple boost capacitor functions into a single shared boost capacitor that can serve multiple write assist circuits. This consolidation significantly reduces the area occupied by the device while maintaining the ability to provide reliable write operations through voltage boosting.
Solution Approach 2:
The patent transitions from a spatial distribution of multiple boost capacitors to a time-multiplexed sharing model. The single shared capacitor is selectively connected to different write assist circuits at different times, effectively using the time dimension to replace the need for multiple physical capacitors, thus reducing device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The write assist circuitry improves the reliability of memory devices by enabling successful write operations even with transistors of varying strengths, reducing write failures and power consumption while minimizing excessive voltage stress on unneeded columns.
Implementation Method 1
A negative bitline write assist circuitry is introduced, which includes a shared boost capacitor and write assist circuits that selectively drive bitlines to a negative voltage during write operations
Data Source
AI summary
Write assist circuitry is disclosed to assist a memory device in changing logical states during a write operation. The write assist circuit includes write assist circuits which can be coupled to a shared boost capacitor to provide write assistance to the memory device. The write assist circuit includes boost switch circuit to selectively couple one or more of the write assist circuits and the shared boost capacitor. The one or more write assist circuits, when coupled to the shared capacitor, provide negative bitline assistance by selectively driving one of its corresponding bitlines pairs to be negative during a write operation.