Shared Boot Memory for CPU and BMC
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Solution Overview
Problem
The existing boot management systems in computing systems face inefficiencies due to the balkanization of booting sequences and settings between processors and controllers, leading to suboptimal communication and increased boot times, as they rely on different non-volatile memory formats and require translations, which can result in longer initialization times and decreased performance.
Innovation Solution
Implementing a computing system with a central processing unit (CPU) and a baseboard management controller (BMC) that utilize a shared boot non-volatile memory in an open standard format, such as Vital Product Data (VPD) or JavaScript Object Notation (JSON), allowing direct access and sharing of system settings, and employing a multiplexer to manage temporal ownership of this memory, thereby minimizing communication and translations during the boot process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate non-volatile memory modules are used for CPU and BMC boot sequences, then each controller has dedicated storage, but communication between controllers and processors becomes suboptimal and boot times increase
Solution Approach 1:
The patent merges the previously separate non-volatile memory modules into a single shared boot non-volatile memory that both the CPU and BMC can access. This consolidation eliminates the need for separate dedicated storage, enabling direct communication and data sharing between controllers and processors, thereby reducing boot times while maintaining data integrity through temporal ownership protocols.
Solution Approach 2:
The shared boot non-volatile memory serves multiple functions: it stores boot sequences for both the CPU and BMC, holds system settings in open standard formats, and provides a communication interface between different controllers and processors. This multi-functional design replaces the need for separate dedicated memory modules while improving system efficiency.
2Adaptability or versatility
If different non-volatile memory formats are used for CPU and BMC, then each controller has optimized storage, but translations are required between formats increasing boot time
Solution Approach 1:
The patent implements homogeneity by storing all boot sequences and system settings in a unified open standard format within the shared boot non-volatile memory. This eliminates the need for format translations between different controllers and processors, allowing direct reading and interpretation of data by any component, thereby streamlining the boot process and improving overall efficiency.
3Productivity
If temporal ownership protocols are implemented for shared memory access, then direct access and sharing is enabled, but memory access coordination complexity increases
Solution Approach 1:
The patent implements dynamic temporal ownership protocols that automatically manage memory access rights between the CPU and BMC based on real-time needs. The ownership status changes dynamically during the boot process, allowing one controller to have exclusive access when writing critical data while the other can read simultaneously or wait for its turn. This dynamic approach enables efficient shared memory access without requiring complex static coordination mechanisms.
Data Source
AI summary
A computing system is provided. The computing system a central processing unit (CPU) configured to run a basic input/output system (BIOS) service and an operating system (OS). The computing system further includes a baseboard management controller (BMC) and a first boot non-volatile memory coupled to both the CPU and the BMC. A first portion of the first boot non-volatile memory stores system settings and configuration in an open standard such that the BIOS and the BMC can access the system settings based on a temporal ownership of the first portion of the first boot non-volatile memory.