Shared Boundary Scan Elements for I/O Pin Testing

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Solution Overview

Problem

Existing integrated circuit testing methods require dedicated boundary scan elements for each I/O pin, leading to increased circuit area and complexity, especially for I/O pins without dedicated boundary scan elements, which can result in longer testing times and increased complexity.

Innovation Solution

The proposed solution involves sharing boundary scan elements among sets of I/O pins, using test circuitry and a test controller to drive binary test signals through the shared boundary scan elements to both I/O devices with and without dedicated boundary scan elements, thereby allowing for boundary scan testing of all I/O devices within a single test routine.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated boundary scan elements are provided for each I/O pin, then testing coverage is improved, but circuit area and complexity increase

Engineering Contradiction:
Improvetesting coverageVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The boundary scan elements are designed to serve multiple I/O pins rather than being dedicated to a single pin. The test controller selectively couples boundary scan elements to different I/O pins during different test operations, allowing one boundary scan element to perform testing functions for multiple pins sequentially, thereby reducing the total number of boundary scan elements required while maintaining comprehensive testing coverage

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system employs dynamic reconfiguration of the test circuitry through selective coupling mechanisms controlled by the test controller. The boundary scan elements can be dynamically connected to different I/O pins based on which pin requires testing at any given moment, transforming a static one-to-one mapping into a dynamic many-to-one relationship that optimizes resource utilization

Inventive Principle:
Principle #15Dynamics

2Reliability

If dedicated boundary scan elements are provided for each I/O pin, then testing completeness is improved, but testing time increases

Engineering Contradiction:
Improvetesting completenessVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Multiple testing functions for different I/O pins are merged into a unified test routine. The test controller orchestrates the selective coupling of boundary scan elements to different I/O pins within a single integrated test sequence, combining what would traditionally require separate test operations into one cohesive testing process that maintains completeness while reducing overall testing time

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The test controller maintains continuous testing operations by seamlessly transitioning the boundary scan elements from one I/O pin to another without interrupting the overall test flow. This continuous reconfiguration allows the testing process to proceed without idle time between tests on different pins, keeping the testing action productive throughout the entire test cycle

Inventive Principle:
Principle #20Continuity of useful action

3Adaptability or versatility

If more boundary scan elements are used, then testing capability is improved, but resource requirements increase

Engineering Contradiction:
Improvetesting capabilityVSAvoidresource requirements
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

Boundary scan elements are designed with universal functionality to test multiple types of I/O pins through selective coupling. Rather than requiring specialized boundary scan elements for each pin type, the system uses a smaller set of versatile boundary scan elements that can be configured to test any I/O pin in the array, thereby maintaining high testing capability while reducing the quantity of boundary scan elements required

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250085346A1Merged parametric scan topology
Publication Date: 2025.03.13 TEXAS INSTRUMENTS INC
  • US20250085346A1 patent drawing
  • US20250085346A1 patent drawing
  • US20250085346A1 patent drawing

AI summary

Methods and apparatus for boundary scan. In one example, a circuit includes at least one first input/output (I/O) device, at least one boundary scan element coupled to the at least one first I/O device, and at least one second I/O device coupled to the at least one boundary scan element. The circuit may further include a test controller coupled to the at least one boundary scan element and configured to control the at least one boundary scan element to drive the at least one first I/O device and the at least one second I/O device with a binary test signal.