Shared Buffer Asynchronous Writing for Data Throughput

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing data processing systems face bottlenecks when multiple threads or processors attempt to transmit data through a shared buffer, leading to inefficiencies as faster threads are forced to wait for slower ones, even when they could operate concurrently.

Innovation Solution

Implementing a shared buffer that allows asynchronous writing from multiple threads while being read serially, eliminating the need for traditional semaphores and enabling faster threads to write data without waiting for slower ones to complete their transfers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple threads share a common buffer for data transmission, then resource utilization is improved, but faster threads are forced to wait for slower threads, reducing overall throughput

Engineering Contradiction:
Improvebuffer sharing capabilityVSAvoiddata throughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The shared buffer is segmented into multiple independent regions, each assigned to a specific thread. This allows each thread to have dedicated write access to its assigned region while maintaining efficient serial read access to the entire buffer, eliminating the waiting problem between threads

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer structure transitions from a single linear queue to a multi-dimensional structure with separate write regions for each thread and a unified read region. This dimensional transformation allows concurrent writes from multiple threads without interfering with each other or the read operation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If threads use traditional semaphore-based synchronization for shared buffer access, then data integrity is maintained, but system complexity increases and performance decreases

Engineering Contradiction:
Improvedata integrityVSAvoidsynchronization mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The complex semaphore-based synchronization mechanism is completely removed from the system. Instead, a simple pointer-based region assignment system is used, where each thread is given a specific write region and advances a pointer within that region, eliminating the need for locks and semaphores while maintaining data integrity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Each thread independently manages its own write region and pointer without requiring external synchronization control. The buffer management system automatically assigns regions and tracks pointers, allowing threads to operate autonomously without interfering with each other

Inventive Principle:
Principle #25Self-service

3Ease of operation

If a single thread transmits data through a shared buffer, then transmission control is simplified, but resource utilization decreases when multiple processors need to use the buffer

Engineering Contradiction:
Improvetransmission control simplicityVSAvoidresource utilization
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The buffer is segmented into multiple independent write regions, allowing multiple processors and threads to simultaneously write data to different regions. The read operation remains simple and sequential, maintaining ease of operation while dramatically improving resource utilization through parallel write access

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10114741B1Data traffic reservation systems and methods
Publication Date: 2018.10.30 LEVYX LLC
  • US10114741B1 patent drawing
  • US10114741B1 patent drawing
  • US10114741B1 patent drawing

AI summary

An improved transmission system that utilizes a shared buffer accessible by multiple threads, processes, or other discrete systems of different producing speeds is disclosed which limits transmission bottlenecks which occur when producers write data at different speeds. The system reserves portions of the shared buffer for each of the different producers, and allows the producers to write to the shared buffer asynchronously—even if the shared buffer is read from serially. This allows a fast producer to write its data to the shared buffer without needing to wait “in line” for slower producers.