Shared Buffer Credit Partitioning to Prevent Engine Deadlock

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Solution Overview

Problem

In graphic processing systems, common resources such as the translation lookaside buffer (TLB) and memory request logic can become blocked by page faults from one engine, leading to resource overtake and deadlock scenarios, affecting all engines and causing system instability.

Innovation Solution

Implementing credit management for shared resource partitioning, where each engine receives a number of credits to access common resources, with static or dynamic credit allocation methods to optimize resource utilization and prevent deadlocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple virtual machines share a single physical network card, then resource utilization is improved, but packet loss increases due to buffer overflow

Engineering Contradiction:
Improveresource utilizationVSAvoidpacket loss
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the single shared buffer into multiple virtual buffers, with each virtual buffer dedicated to a specific virtual machine. This segmentation prevents one VM from monopolizing the buffer and causing overflow for other VMs, thereby reducing packet loss while maintaining resource sharing benefits

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a buffer management module as an intermediary between virtual machines and the physical network card. This module dynamically allocates and manages buffer resources, assigning appropriate buffer sizes to each VM based on traffic patterns and priorities, thus preventing buffer overflow and packet loss

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If a single shared buffer is used for multiple virtual machines, then device complexity is reduced, but packet processing performance deteriorates due to buffer contention

Engineering Contradiction:
Improvebuffer management complexityVSAvoidpacket processing performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The buffer is segmented into multiple virtual buffers that can be independently managed and allocated. This segmentation reduces contention by providing dedicated buffer spaces for each VM, improving packet processing performance while maintaining manageable complexity through systematic buffer assignment

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The buffer allocation is made dynamic rather than static. The buffer management module can adjust buffer sizes and assignments in real-time based on traffic demands, ensuring optimal packet processing performance while adapting to changing conditions without requiring complex manual configuration

Inventive Principle:
Principle #15Dynamics

3Reliability

If buffer size is increased to prevent overflow, then packet loss is reduced, but memory usage increases

Engineering Contradiction:
Improvepacket lossVSAvoidmemory usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Instead of uniformly increasing buffer size for all virtual machines, the patent applies local quality by allocating buffer sizes specific to each VM's actual traffic needs. The buffer management module analyzes individual VM traffic patterns and assigns appropriate buffer sizes, reducing overall memory usage while preventing packet loss for each specific VM

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent dynamically changes buffer allocation parameters based on traffic conditions. Rather than using a fixed large buffer for all VMs, the system adjusts buffer sizes as parameters according to actual traffic demands, maintaining reliability by preventing overflow while optimizing memory usage through adaptive parameter adjustment

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3497557B1Apparatus and method for shared resource partitioning through credit management
Publication Date: 2023.12.06 INTEL CORP
  • EP3497557B1 patent drawingFigure 1
  • EP3497557B1 patent drawingFigure 2
  • EP3497557B1 patent drawingFigure 3

AI summary

An apparatus is provided which comprises: a first engine buffer to receive a first engine request; a first engine register coupled to the first engine buffer, wherein the first engine register is to store first engine credits associated with the first engine buffer; a second engine buffer to receive a second engine request; a second engine register coupled to the second engine buffer, wherein the second engine register is to store second engine credits associated with the second engine buffer; and a common buffer which is common to the first and second engines, wherein the first engine credits represents one or more slots in the common buffer for servicing the first engine request for access to a common resource, and wherein the second engine credits represents one or more slots in the common buffer for servicing the second engine request for access to the common resource.