Shared Buffer Unit for Nonvolatile Memory Data Transfer

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Solution Overview

Problem

In nonvolatile semiconductor memory devices, the existing configuration of separate sense amplifiers and page buffers for first and second memory cell arrays increases the length of read paths, leading to slower data transfer to external terminals.

Innovation Solution

A common buffer unit is shared by both memory cell arrays, allowing external terminals to be positioned closer to the buffer unit, thereby reducing the transfer path length and enhancing data transfer efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If separate sense amplifiers and page buffers are arranged to sandwich the first and second memory cell arrays, then data can be read from both memory cell arrays, but the read path length increases and data transfer to external terminals becomes slower

Engineering Contradiction:
Improvedata transfer speedVSAvoidread path length
Core Design Contradiction:
Ease of operationVSLength of moving object

Solution Approach 1:

The patent merges the separate buffer units for the first and second memory cell arrays into a single shared buffer unit. This consolidation allows both memory cell arrays to share the same buffer resource, eliminating the need for separate buffers and reducing the overall path length from the memory cell arrays to external terminals, thereby improving data transfer speed

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared buffer unit serves multiple functions by handling data from both the first and second memory cell arrays simultaneously. This multi-functional buffer can buffer data from either or both memory cell arrays, reducing the need for dedicated separate buffers and optimizing the use of buffer resources while shortening data paths

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If separate sense amplifiers and page buffers are arranged to sandwich the first and second memory cell arrays, then both memory cell arrays can operate independently, but the device occupies more area and becomes less compact

Engineering Contradiction:
Improveindependent operation capabilityVSAvoiddevice area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent combines separate buffer units into a single shared buffer unit that serves both memory cell arrays. This merging reduces the total area occupied by buffer components while maintaining the capability to independently access and buffer data from either memory cell array, thus achieving a more compact device design without sacrificing operational independence

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared buffer unit is designed to handle data from both memory cell arrays through multi-functional operation. It can selectively buffer data from the first memory cell array, the second memory cell array, or both simultaneously, enabling independent operation capability while occupying less area than separate dedicated buffers would require

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9418742B2Nonvolatile semiconductor memory device and memory system having the same
Publication Date: 2016.08.16 LONGITUDE LICENSING LTD
  • US9418742B2 patent drawing
  • US9418742B2 patent drawing
  • US9418742B2 patent drawing

AI summary

A nonvolatile semiconductor memory device includes a first string including a first number of memory cells connected in series each storing therein information in a nonvolatile manner; and a second string including a second number of memory cells connected in series each storing therein information in a nonvolatile manner, wherein the second number is smaller than the first number.