Shared Buffers for Network Processing Elements

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing number of virtual machines (VMs) and queues supported by I/O devices leads to a significant requirement for hundreds of gigabytes of memory for receive buffers, resulting in high costs and power consumption, making current techniques for separately allocated receive buffers increasingly problematic.

Innovation Solution

Implementing encryption and decryption of data in shared buffers using exchanged block cipher keys, allowing multiple processing elements to share memory buffers and reducing the need for extensive physical memory allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If separate receive buffers are allocated to each queue for processing elements, then line rate throughput is sustained for each queue, but memory requirements increase to hundreds of gigabytes

Engineering Contradiction:
Improveline rate throughputVSAvoidmemory requirements
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent merges separate receive buffers for multiple queues into shared buffer pools that can be dynamically allocated to different queues. Instead of dedicating fixed memory to each queue, the system creates common buffer resources that multiple processing elements and queues can access, thereby reducing total memory requirements while maintaining throughput capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements dynamic buffer allocation where buffer assignments are not fixed but can be reassigned based on current queue activity and throughput requirements. This dynamic approach allows the same physical memory to serve multiple queues at different times, reducing the peak memory requirement from hundreds of GB to a fraction of that amount.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If memory allocation is increased to support thousands of queues, then queue capacity is expanded, but power consumption and operational costs increase significantly

Engineering Contradiction:
Improvequeue capacityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by stationary object

Solution Approach 1:

The patent makes memory buffers universal by creating shared buffer pools that can serve multiple queues and processing elements. The same physical memory resources perform multiple functions for different queues at different times, eliminating the need for dedicated memory per queue. This multi-functionality reduces total memory requirements from hundreds of GB to manageable levels, thereby reducing power consumption and operational costs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If dedicated receive buffers are assigned to each processing element, then data access speed is optimized, but memory cost and device complexity increase

Engineering Contradiction:
Improvedata access speedVSAvoidbuffer management complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the buffer management system into distinct components: shared buffer pools, allocation managers, and queue-specific buffer identifiers. This segmentation allows multiple queues to access shared memory resources while maintaining logical separation and fast access paths. The segmentation enables efficient buffer management without requiring dedicated physical buffers for each queue, thus reducing complexity while preserving speed.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9973335B2Shared buffers for processing elements on a network device
Publication Date: 2018.05.15 INTEL CORP
  • US9973335B2 patent drawing
  • US9973335B2 patent drawing
  • US9973335B2 patent drawing

AI summary

Examples are disclosed for exchanging a key between an input/output device for network device and a first processing element operating on the network device. Data having a destination associated with the first processing element may be received by the input/output device. The exchanged key may be used to encrypt the received data. The encrypted data may then be sent to a buffer maintained at least in part in a memory for the network device. The memory may be arranged to enable sharing of the buffer with at least a second processing element operating on the network device. Examples are also disclosed for the processing element to receive an indication of the storing of the encrypted data in the buffer. The processing element may then obtain the encrypted data from the buffer and decrypt the data using the exchanged key.