Shared Bus Line Merging for Semiconductor Integrated Circuit Power Reduction
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Solution Overview
Problem
The increasing data width and memory capacity in semiconductor integrated circuits lead to a tradeoff between growing power consumption and cost increase due to the need for more bus lines, which is exacerbated by the limited wiring resources in upper layers, resulting in inefficient power usage and higher costs.
Innovation Solution
The semiconductor integrated circuit design merges the middle parts of bus lines extending laterally along the horizontal sides of banks into shared bus lines, reducing the minimum required bus wiring resources by half and minimizing power consumption by reducing the number of bus lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data width and memory capacity are increased, then memory performance is improved, but the number of bus lines increases leading to higher power consumption and cost
Solution Approach 1:
The patent merges the middle parts of bus lines that extend laterally along the horizontal sides of banks into shared bus lines. Specifically, bus lines from different banks are combined into common bus lines in the horizontal region, reducing the total number of bus lines required and thereby reducing power consumption while maintaining the ability to serve multiple banks.
2Productivity
If data width and memory capacity are increased, then memory performance is improved, but wiring resources are exhausted leading to cost increase
Solution Approach 1:
The patent merges the middle parts of bus lines that extend laterally along the horizontal sides of banks into shared bus lines. Specifically, bus lines from different banks are combined into common bus lines in the horizontal region, reducing the total number of bus lines required and thereby reducing power consumption while maintaining the ability to serve multiple banks.
3Use of energy by moving object
If separate bus lines are provided for each bank, then power consumption is reduced, but wiring resources increase leading to area enlargement
Solution Approach 1:
The patent merges the middle parts of bus lines that extend laterally along the horizontal sides of banks into shared bus lines. Specifically, bus lines from different banks are combined into common bus lines in the horizontal region, reducing the total number of bus lines required and thereby reducing power consumption while maintaining the ability to serve multiple banks.
Data Source
AI summary
Disclosed is a semiconductor integrated circuit in which the number of bus lines is reduced and current consumption during operation can be lessened. The semiconductor integrated circuit includes a circuit unit (e.g., a memory cell array plate) which is divided into a plurality of banks (bank 1, bank 2) and processes multiple bits of data; a plurality of input/output circuits which perform input and output of multiple bits of data; and a plurality of bus lines which provide electrical coupling between the respective data input/output circuits and the circuit unit. Among the bus lines, two or more bus lines laid to extend laterally along the horizontal sides of the banks and coupled to different banks include a common bus line adapted as a shared bus line into which the middle parts of the bus lines are merged.


