Shared Cache Eviction Using Core Access Tracking
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Solution Overview
Problem
Conventional shared cache eviction schemes in multi-core processor architectures do not consider which processor cores access cache lines, leading to inefficient eviction policies that do not prioritize cache lines accessed by all processor cores.
Innovation Solution
A system and method for shared cache eviction that identifies and evicts cache lines accessed by fewer processor cores, using a cache reference tracker to determine access patterns and prioritize cache lines accessed by the fewest number of cores, thereby preserving those accessed by more cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional eviction schemes evict the least frequently used or least recently used cache line without considering processor core access, then the eviction process is simple and fast, but cache efficiency deteriorates because cache lines accessed by multiple cores may be evicted
Solution Approach 1:
The patent segments the cache line information by tracking which processor cores have accessed each cache line. The cache reference tracker divides the monitoring task into individual core access events, recording each core's access to each cache line separately. This segmentation enables the eviction policy to make informed decisions based on multi-core access patterns rather than treating all cache lines uniformly.
Solution Approach 2:
The patent implements feedback by continuously monitoring cache line access patterns across multiple processor cores and using this information to guide eviction decisions. The cache reference tracker provides feedback about which cache lines are accessed by how many cores, and the eviction policy uses this feedback to prioritize keeping cache lines that are accessed by multiple cores while evicting those accessed by fewer cores.
2Reliability
If the cache tracks access patterns of multiple processor cores for each cache line, then cache efficiency improves by preserving frequently accessed lines, but the complexity of the eviction policy increases
Solution Approach 1:
The patent applies preliminary action by pre-tracking cache line access patterns before eviction decisions are needed. The cache reference tracker continuously monitors and records which processor cores access each cache line in advance, building up a history of access patterns. When eviction is needed, this pre-collected information is already available, allowing for accurate and timely eviction decisions without complex real-time analysis.
Solution Approach 2:
The patent introduces an intermediary component called the cache reference tracker that mediates between processor core access events and eviction decisions. This intermediary collects and processes access information from multiple cores, maintaining a record of which cores have accessed each cache line. It then provides this processed information to the eviction policy, simplifying the overall system architecture by centralizing the tracking function.
Data Source
AI summary
Methods and systems for shared cache eviction in a multi-core processing environment having a cache shared by a plurality of processor cores are provided. Embodiments include receiving from a processor core a request to load a cache line in the shared cache; determining whether the shared cache is full; determining whether a cache line is stored in the shared cache that has been accessed by fewer than all the processor cores sharing the cache if the shared cache is full; and evicting a cache line that has been accessed by fewer than all the processor cores sharing the cache if a cache line is stored in the shared cache that has been accessed by fewer than all the processor cores sharing the cache.