Shared Capacitor Bridge Patterns for High-Resolution OLED Pixels
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Solution Overview
Problem
Current display devices face challenges in integrating ultra-high resolution electric elements within a small area, particularly in OLED technology, where the design space for components is limited due to the need for multiple transistors and capacitors in each pixel.
Innovation Solution
The display device design shares a storage capacitor between sub-pixels, utilizing a specific layer structure with bridge patterns and voltage supply lines to form capacitors, allowing for efficient use of space and enabling ultra-high resolution in a compact area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple transistors and capacitors are included in each pixel for OLED driving, then the display device achieves proper pixel functionality, but the design space for components is limited and the area occupied by electric elements increases
Solution Approach 1:
The patent merges the storage capacitor function into a shared structure that serves multiple sub-pixels simultaneously. The common electrode line acts as a shared capacitor electrode for multiple pixel circuits, reducing the total number of discrete capacitor components needed while maintaining proper pixel functionality through the shared capacitance structure.
Solution Approach 2:
The voltage supply line serves multiple functions: it supplies driving voltage to pixel circuits and simultaneously forms capacitor structures with common electrode lines. This multi-functional design reduces the need for separate dedicated capacitor components, optimizing the use of limited design space in each pixel.
2Measurement precision
If ultra-high resolution electric elements are integrated, then the display resolution is improved, but the area required for these elements increases
Solution Approach 1:
The patent transitions from planar capacitor layouts to a multi-layer three-dimensional structure using conductive layers stacked vertically. The first, second, and third conductive layers create vertical separation between capacitor electrodes, enabling ultra-high resolution electric elements to be integrated in a compact area by utilizing the vertical dimension for capacitor formation.
Solution Approach 2:
The patent implements nested capacitor structures where capacitor electrodes are embedded within multiple conductive layers. The first conductive layer with bridge patterns is nested within the second conductive layer containing voltage supply lines, which are in turn nested within the third conductive layer with common electrode lines, creating space-efficient nested capacitor configurations for ultra-high resolution displays.
Data Source
AI summary
A display device includes: a substrate; a first conductive layer including gate electrodes respectively disposed in pixel circuit areas arranged in a first direction on the substrate; a second conductive layer disposed on the first conductive layer, the second conductive layer including first bridge patterns; a third conductive layer disposed on the second conductive layer, the third conductive layer including a voltage supply line for supplying a driving voltage and second bridge patterns; and a fourth conductive layer disposed on the third conductive layer, the fourth conductive layer including common electrode lines which are electrically connected to the gate electrodes through the first and second bridge patterns and are electrically disconnected from the voltage supply line. The common electrode lines are arranged in a second direction intersecting the first direction, and each of the common electrode lines extends in the first direction to overlap with the pixel circuit areas.