Memory Storage Capacitor Structure With Shared Block Connections
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Solution Overview
Problem
Existing semiconductor memory technologies face challenges in miniaturization due to the large area occupied by conductive connection structures for leading out second plates of storage capacitors, which also increase manufacturing complexity and costs.
Innovation Solution
The second plates of storage capacitors across multiple blocks or banks are connected, reducing the need for individual conductive connection structures and eliminating the disconnecting process, thereby minimizing the memory area and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If individual conductive connection structures are used to lead out second plates of storage capacitors in each block, then each block can be independently connected, but the memory area increases and manufacturing complexity increases
Solution Approach 1:
The patent merges the second plates of storage capacitors across multiple blocks by connecting them to a common conductive structure. Instead of providing separate conductive connection structures for each block, the invention combines multiple blocks into a single integrated structure where second plates are shared or commonly connected, thereby reducing the total area occupied by conductive connections while maintaining electrical connectivity across all blocks.
Solution Approach 2:
The common conductive structure serves multiple functions simultaneously: it acts as the second plate for storage capacitors in multiple blocks, provides a shared reference potential, and enables inter-block connectivity. This multi-functional design eliminates the need for separate dedicated connection structures for each block, reducing overall area and manufacturing complexity.
2Reliability
If individual conductive connection structures are used to lead out second plates of storage capacitors in each block, then each block can be independently connected, but the manufacturing complexity and costs increase
Solution Approach 1:
The patent merges the second plates of storage capacitors across multiple blocks by connecting them to a common conductive structure. Instead of providing separate conductive connection structures for each block, the invention combines multiple blocks into a single integrated structure where second plates are shared or commonly connected, thereby reducing the total area occupied by conductive connections while maintaining electrical connectivity across all blocks.
Solution Approach 2:
The invention extracts and eliminates the unnecessary disconnecting process from the manufacturing flow. By designing the memory structure with inherently connected second plates across blocks, the patent removes the need for post-fabrication disconnecting operations, simplifying the manufacturing process and reducing associated costs while maintaining the ability to functionally isolate blocks when needed.
3Area of stationary object
If the second plates of storage capacitors across multiple blocks are connected, then the memory area is reduced, but the disconnecting process is eliminated which may affect operational flexibility
Solution Approach 1:
The patent introduces dynamic control mechanisms that allow the memory system to switch between connected and isolated states for different blocks. Through control circuits and switching elements, the system can dynamically connect or disconnect specific blocks from the common structure based on operational requirements, thereby maintaining both area efficiency and operational flexibility.
Solution Approach 2:
While maintaining a common connected structure for area efficiency, the patent segments the memory into independently controllable blocks. Each block can be individually activated, deactivated, or isolated through control signals, allowing the system to treat the unified structure as multiple independent functional units when needed, thus preserving operational flexibility.
Data Source
AI summary
According to one aspect of the present disclosure, a memory is provided. The memory may include a plurality of blocks each including a first semiconductor structure. The first semiconductor structure includes a memory cell array. The memory cell array may include a plurality of storage capacitors. The storage capacitor may include a first plate, a second plate, and a dielectric layer located between the first plate and the second plate. The second plates of the plurality of storage capacitors in the block may be connected, and the second plates of the storage capacitors of at least two blocks of the plurality of blocks may be connected.