Shared Capacitor Power Allocation for Persistent Memory Regions

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Solution Overview

Problem

Existing power fail management systems for persistent memory regions in data storage devices are inefficient and do not effectively utilize shared host capacitors, leading to suboptimal power allocation and performance in multi-device environments.

Innovation Solution

A method and system for dynamically reallocating power from a shared host capacitor among multiple data storage devices based on their requirements, priority, and system needs, ensuring efficient data transfer and storage during power failures by using a PMR control module to manage PMR partitions and buffer sizes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a shared host capacitor is used for multiple data storage devices, then power utilization efficiency is improved, but power allocation control becomes more complex

Engineering Contradiction:
Improvepower utilization efficiencyVSAvoidpower allocation control
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements dynamic power allocation where the host controller continuously monitors power requirements of multiple data storage devices and adjusts power distribution in real-time based on current operational needs, device priorities, and capacitor charge levels, transforming static power allocation into a dynamic adaptive system

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback mechanisms where power consumption data from each device is fed back to the host controller, which then adjusts power allocation accordingly. The host capacitor management module uses this feedback to optimize power distribution and prevent power exhaustion during emergency power fail scenarios

Inventive Principle:
Principle #23Feedback

2Productivity

If power is dynamically reallocated among multiple devices, then PMR performance is improved, but system reliability during power failure becomes more challenging

Engineering Contradiction:
ImprovePMR performanceVSAvoidsystem reliability during power failure
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements preliminary power allocation strategies where the host controller pre-determines power distribution to each device's persistent memory region based on priority levels and expected power failure scenarios, ensuring critical devices have sufficient power allocated before a power fail event occurs

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system maintains reserved power capacity in the host capacitor as a cushion against power failure, dynamically adjusting the allocation to ensure minimum power availability for emergency data evacuation from PMR to non-volatile memory, protecting against the worst-case scenario

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Productivity

If buffer sizes are adjusted dynamically, then data transfer efficiency is improved, but control complexity increases

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidcontrol complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic buffer size adjustment where the host controller monitors data transfer operations and automatically scales buffer sizes based on current workload, device performance characteristics, and available power capacity, optimizing data transfer efficiency without manual intervention

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances power utilization, reduces power consumption, and improves PMR performance in multi-device systems by ensuring data is safely transferred to non-volatile memory during emergencies, maintaining system efficiency and reliability.

Implementation Method 1

the host comprises a capacitor shared by the plurality of data storage devices

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12493421B2System and method for flexible emergency power fail management for multiple persistent memory regions
Publication Date: 2025.12.09 WESTERN DIGITAL TECHNOLOGIES INC
  • US12493421B2 patent drawing
  • US12493421B2 patent drawing
  • US12493421B2 patent drawing

AI summary

A system and method are disclosed for flexible emergency power fail management for multiple persistent memory regions. In one embodiment, a method is provided that is performed in a host in communication with a plurality of data storage devices, each data storage device having a persistent memory region, wherein the host comprises a capacitor shared by the plurality of data storage devices. The method comprises determining an allocation of power from the capacitor to each of the plurality of data storage devices; and dynamically changing the allocation of power from the capacitor to at least one data storage device of the plurality of data storage devices. Other embodiments are disclosed.