Shared External Capacitor Switching for SoC Voltage Droop

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Solution Overview

Problem

The reduction in design area of systems on chip due to miniaturization limits the placement of external capacitors, which are necessary to mitigate voltage droops in high-performance processing circuits, leading to inefficiencies in voltage regulation.

Innovation Solution

A system on chip that includes a controller to manage the connection between processing circuits and external capacitors based on the state of these circuits, allowing selective use of external capacitors to mitigate voltage droops by connecting them to circuits with higher droop or load demands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external capacitors are added to mitigate voltage droops in processing circuits, then voltage regulation is improved, but the design area of the system on chip is increased

Engineering Contradiction:
Improvevoltage regulationVSAvoiddesign area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements a shared external capacitor that can be selectively connected to different processing circuits based on their voltage droop conditions. The connection circuit enables one capacitor to serve multiple processing circuits (first processing circuit and second processing circuit) rather than dedicating separate capacitors to each circuit, thus reducing the total area while maintaining voltage regulation effectiveness across multiple circuits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs dynamic connection control where the connection circuit selectively connects the external capacitor to different processing circuits based on real-time voltage droop detection. The controller dynamically determines which processing circuit needs capacitance support and establishes the connection accordingly, allowing adaptive voltage regulation without requiring static allocation of capacitors to each circuit.

Inventive Principle:
Principle #15Dynamics

2Reliability

If multiple external capacitors are allocated to different processing circuits, then voltage droop mitigation is improved, but device complexity is increased

Engineering Contradiction:
Improvevoltage droop mitigationVSAvoidcapacitor allocation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses a single shared external capacitor that can be dynamically allocated to different processing circuits through the connection circuit. This universal capacitor serves multiple functions by supporting both the first processing circuit and the second processing circuit as needed, eliminating the need for multiple dedicated capacitors and reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The connection circuit acts as an intermediary between the shared external capacitor and multiple processing circuits. It manages the allocation and connection dynamics, determining when and which circuit should receive capacitance support from the shared capacitor, thereby simplifying the overall system architecture compared to direct one-to-one capacitor-circuit connections.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If a shared external capacitor is used for multiple processing circuits, then area efficiency is improved, but voltage droop mitigation effectiveness may be reduced

Engineering Contradiction:
Improvecapacitor areaVSAvoidvoltage droop mitigation effectiveness
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent implements dynamic connection control where the controller monitors voltage droop conditions in different processing circuits and selectively connects the shared external capacitor to the circuit experiencing voltage droop. This dynamic allocation ensures that the full capacitance value is available to the circuit that needs it most at any given time, maintaining effective voltage droop mitigation while using a single shared capacitor.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback mechanisms where the controller detects voltage droop conditions in processing circuits and uses this information to control the connection circuit. The feedback loop ensures that the shared capacitor is connected to the appropriate processing circuit when voltage droop occurs, maintaining effective voltage regulation despite the shared capacitor configuration.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach efficiently uses external capacitors to mitigate voltage droops, optimizing power management and reducing the need for multiple capacitors, thereby enhancing the performance and efficiency of the system on chip.

Implementation Method 1

the processing circuits may receive a capacitance from an external capacitor to improve a droop phenomenon in which the supply voltages drop significantly

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12560989B2System on chip controlling connection of processing unit to external capacitor to reduce voltage droop and electronic system including the same
Publication Date: 2026.02.24 SAMSUNG ELECTRONICS CO LTD
  • US12560989B2 patent drawing
  • US12560989B2 patent drawing
  • US12560989B2 patent drawing

AI summary

A system on chip includes a processing unit including the first processing circuit and a second processing circuit, a connection circuit configured to form a path connecting one of the first processing circuit and the second processing circuit to an external capacitor, and a controller configured to control the connection circuit based on a state of at least one of the first processing circuit and the second processing circuit.