Shared CDM Discharge Circuit for ESD Protection
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Solution Overview
Problem
Conventional semiconductor devices face challenges in minimizing the area occupied by electrostatic discharge circuits and reducing pin capacitance, which hinders the realization of small-sized and high-speed semiconductor devices due to the use of independent electrostatic discharge circuits and parallel connections of transistors and resistors.
Innovation Solution
A circuit design that incorporates a shared CDM discharge unit connected in series with switching units, including PMOS and NMOS transistors, and a GGNMOS transistor, which reduces the area occupied by the electrostatic discharge circuit and decreases pin capacitance by using a single resistor and discharge unit shared among multiple internal circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If independent electrostatic discharge circuits are provided for each internal circuit, then the reliability of ESD protection is improved, but the area occupied by the electrostatic discharge circuit increases
Solution Approach 1:
The patent merges multiple independent electrostatic discharge circuits into a single shared CDM discharge unit. Instead of providing separate discharge circuits for each internal circuit, the invention uses one common discharge unit that can serve multiple internal circuits through switching mechanisms, thereby reducing the total area occupied while maintaining ESD protection capability.
Solution Approach 2:
The shared CDM discharge unit is designed to perform multiple functions by serving different internal circuits sequentially or selectively. This universal discharge unit can protect multiple internal circuits against ESD events, replacing the need for dedicated discharge circuits for each internal circuit.
2Power
If transistors and resistors are connected in parallel between internal circuit and input/output pad, then the ESD current discharge capability is improved, but the pin capacitance increases
Solution Approach 1:
The patent merges the parallel connection structure into a series connection structure. Instead of connecting transistors and resistors in parallel between the internal circuit and input/output pad, the invention connects them in series through the switching unit and discharge unit, which reduces the pin capacitance while maintaining adequate ESD current discharge capability through the series path.
3Area of stationary object
If a shared CDM discharge unit is used among multiple switching units, then the area of the electrostatic discharge circuit is decreased, but the circuit complexity increases
Solution Approach 1:
The patent segments the ESD protection function into switching units and a discharge unit. Each switching unit can independently control connection to the shared discharge unit, allowing modular design that reduces overall area while managing complexity through functional segmentation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively decreases the area of the electrostatic discharge circuit and reduces pin capacitance, enabling the creation of smaller, high-speed semiconductor devices with improved integration and operational efficiency.
Implementation Method 1
the electrostatic discharge circuit 30 is a CDM electrostatic discharge circuit and this is for preventing damage when charges have been accumulated in the ground of a semiconductor device, electrostatic current is discharged through the internal circuit 20 to the input/output pad 10
Implementation Method 2
a plurality of switching units corresponding one-to-one to the input/output pads and turned on in a low voltage state
Data Source
AI summary
The present invention relates to a semiconductor circuit, and more particularly, to a circuit for discharging static electricity, which is connected between an internal circuit and an input/output pad to provide a charge device model (CDM) discharging path. The circuit includes a plurality of input/output pads; a plurality of switching units corresponding one-to-one to the input/output pads and turned on in a low voltage state; resistors connected between the input/output pads and the switching units so as to correspond one-to-one to the input/output pads and the switching units; and a CDM discharge unit shared in serial by the plurality of the switching units and providing a ground path.