Shared Channel Memory System Bandwidth Allocation

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Solution Overview

Problem

Conventional semiconductor memory systems experience low utilization efficiency and increased power consumption when signal transfer bandwidth is set to 'n' due to inefficient channel utilization and activation of memory devices.

Innovation Solution

Implementing a semiconductor memory system where multiple channels share transmission lines connected to a common memory device, allowing the memory control device to allocate and control signal transfer bandwidths, and activate memory devices as needed to optimize operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If signal transfer bandwidth is set to 'n' with separate dedicated transmission lines for each channel, then channel isolation and signal integrity are improved, but device utilization efficiency deteriorates and power consumption increases

Engineering Contradiction:
Improvesignal integrityVSAvoiddevice utilization efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges transmission lines between channels by enabling channels to share common transmission lines connected to memory devices. Specifically, when a memory device is activated, multiple channels can utilize the same transmission lines for signal transfer, thereby improving device utilization efficiency and reducing power consumption while maintaining signal integrity through proper signal timing and coordination.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The transmission lines are designed to serve multiple functions by being shared across different channels. The same transmission line can be used by different channels depending on which memory devices are activated, making the transmission lines universal rather than dedicated to a single channel, thus improving overall system efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple memory devices are activated simultaneously with dedicated transmission lines, then channel capacity is maximized, but power consumption increases

Engineering Contradiction:
Improvechannel capacityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The system dynamically adjusts which memory devices are activated based on actual signal transfer needs. Instead of keeping all memory devices active simultaneously, the memory control device activates only the necessary memory devices and coordinates channel usage dynamically, thereby reducing power consumption while maintaining required channel capacity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters by allowing variable bandwidth allocation and dynamic device activation. The signal transfer bandwidth can be adjusted, and memory devices can be selectively activated or deactivated based on demand, optimizing the balance between channel capacity and power consumption.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If channels share transmission lines, then device utilization efficiency is improved, but signal transfer complexity increases

Engineering Contradiction:
Improvedevice utilization efficiencyVSAvoidsignal transfer complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory control device uses feedback mechanisms to manage shared transmission lines. It monitors which memory devices are active and coordinates signal transfer accordingly, using control signals to manage the shared resources. This feedback-based coordination simplifies the complexity by automating the resource allocation decisions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The memory control device acts as an intermediary that manages the complexity of shared transmission lines. It handles the coordination between multiple channels and memory devices, abstracting the complexity from the individual channels and memory devices while enabling efficient shared resource utilization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8923081B2Semiconductor memory system and operating method thereof
Publication Date: 2014.12.30 SK HYNIX INC
  • US8923081B2 patent drawing
  • US8923081B2 patent drawing
  • US8923081B2 patent drawing

AI summary

A semiconductor memory system configured to exchange signals through channels may include a memory control device configured to have a plurality of channels, a plurality of memory devices configured to be connected to each of the plurality of channels, wherein the plurality of channels share at least one of the plurality of memory devices.