Shared Chip-Enable Memory Control for Selective Volume Activation
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Solution Overview
Problem
Existing memory systems face challenges in reducing interaction between a memory system controller and memory devices coupled via a shared bus, leading to increased power consumption and potential data integrity issues during various memory operations.
Innovation Solution
Implementing a memory control method that activates memory units based on target volume selection, using a shared chip enable signal to manage memory device interactions, and returning units to previous states if commands do not indicate a target volume, with active units remaining active only for specified volumes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory units remain active continuously to maintain readiness for commands, then processing speed is improved, but power consumption increases
Solution Approach 1:
The memory unit dynamically transitions between active and inactive states based on command reception. The unit remains active only when a command indicating a target memory volume is received, and returns to inactive state otherwise, optimizing the balance between processing readiness and power consumption.
Solution Approach 2:
The memory unit employs periodic activation based on command signals rather than continuous activation. The unit is activated periodically when commands are received and deactivated when not needed, reducing power consumption while maintaining operational capability.
2Reliability
If the system controller continuously monitors and manages memory devices via shared bus, then data integrity is improved, but power consumption and interaction overhead increase
Solution Approach 1:
The memory unit autonomously manages its own state transitions between active and inactive based on command reception. This self-service capability reduces the need for continuous controller monitoring and bus interactions, thereby improving data integrity through autonomous state management while reducing power consumption.
3Speed
If memory units are activated for all commands regardless of target volume, then processing speed is improved, but unnecessary interactions increase power consumption
Solution Approach 1:
The memory unit applies selective activation based on the specific target volume indicated in commands. Only the relevant memory unit corresponding to the target volume remains active, while others return to inactive state. This local quality approach ensures processing speed is maintained for relevant operations while minimizing power consumption by avoiding unnecessary activation of non-target units.
Data Source
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AI summary
Memory controllers and methods of controlling memory are described. One such apparatus comprises a system controller and a plurality of memory volumes configured to receive a shared chip enable signal from the system controller. Each memory volume comprises a number of memory units, which are configured to activate responsive to detecting a transition of a state of the shared chip enable signal from a high state to a low state. Responsive to a cycle type of a next cycle issued by the system controller subsequent to the transition of the state of the shared chip enable signal being a volume select command cycle, a target memory volume indicated by the volume select command is selected. Responsive to the cycle type of the next cycle issued by the system controller being a command cycle other than a volume select command cycle, a previously selected memory volume is re-selected.