Shared Circuit Resource Credit Allocation for Fair Processor Access

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Solution Overview

Problem

Existing multi-processor systems face inefficiencies due to unfair allocation of access to shared computational resources, leading to increased execution latency and reduced system performance.

Innovation Solution

A credit-based scheme is implemented to allocate access to a shared circuit resource among multiple processor circuits, where credits accumulate based on the current number of pending requests and deplete at a higher rate during active use, with the option to transition to a priority-based scheme when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a shared co-processor is allocated among multiple processor units, then silicon area efficiency is improved, but execution latency increases due to unfair allocation

Engineering Contradiction:
Improvesilicon area efficiencyVSAvoidexecution latency
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where each processor unit's credit balance is continuously monitored and adjusted based on its access history to the shared co-processor. When a processor unit accesses the co-processor, its credit balance decreases, and when it waits, credits accumulate. This feedback loop ensures fair allocation by preventing any single processor from monopolizing the resource, thereby reducing execution latency while maintaining area efficiency.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces dynamic credit-based allocation where the allocation rights of processor units change over time based on their credit balances. Instead of static allocation, the system dynamically adjusts which processor unit gets access to the co-processor in each time slot based on current credit states. This dynamic approach resolves the contradiction by ensuring both efficient resource utilization (maintaining area efficiency) and fair distribution (reducing latency).

Inventive Principle:
Principle #15Dynamics

2Speed

If one processor unit monopolizes the shared co-processor, then its own execution speed is improved, but overall system productivity decreases

Engineering Contradiction:
Improveprocessor execution speedVSAvoidsystem productivity
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent introduces a credit management unit as an intermediary between processor units and the shared co-processor. This intermediary enforces fair allocation by controlling access based on credit balances, preventing any single processor from monopolizing the resource. The credit management unit mediates between individual processor needs and overall system fairness, ensuring that while each processor can execute at high speed when granted access, the system as a whole maintains high productivity through equitable resource distribution.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If a credit-based allocation scheme is implemented, then fairness in resource distribution is improved, but device complexity increases

Engineering Contradiction:
Improvefairness in allocationVSAvoidallocation mechanism complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent implements fairness through parameter changes, specifically by maintaining and adjusting credit balance values for each processor unit. The complexity is managed by using simple arithmetic operations (incrementing and decrementing credit counters) rather than complex allocation algorithms. This approach achieves fair distribution by changing the state of a simple parameter (credit balance) over time, avoiding the need for sophisticated scheduling mechanisms while maintaining ease of operation in terms of fairness.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4579458A1Device, method and system for determining a credit-based access to a shared circuit resource
Publication Date: 2025.07.02 INTEL CORP
  • EP4579458A1 patent drawingFigure 1
  • EP4579458A1 patent drawingFigure 2
  • EP4579458A1 patent drawingFigure 3

AI summary

Techniques and mechanisms for any of multiple processor circuits to be able to access a shared circuit resource. In an embodiment, processor circuits variously provide respective requests to access a resource of a computation circuit. A pool of requestor processor circuits is managed based on the access requests. For a pending access request, an amount of credit for the corresponding pool member accumulates at a rate which is based on the current pool size. For an access request which is being serviced, the amount of credit for the corresponding pool member is consumed at a relatively fast rate. Access to the resource is allocated based on the respective amounts of credit for each pool member. In another embodiment, a prioritized access request results in a transition from resource access allocation according to a credit-based scheme to resource access allocation according to a priority-based scheme.