Shared Codeword Memory Access for Low-Latency ECC Updates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices face inefficiencies in balancing space and performance when storing additional information such as error correction information and metadata, with conventional two-pass architectures increasing latency and using excessive resources.
Innovation Solution
A two-pass access operation with a shared codeword architecture that combines data and metadata, allowing for efficient error correction through a read-read-modify-write-write cycle, reducing the need for separate cycles and minimizing extra bits read.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a two-pass architecture is used to store metadata and error correction information separately, then data integrity and error correction capabilities are improved, but access latency and operational complexity increase
Solution Approach 1:
The patent merges data and metadata into a single shared codeword structure that is accessed and updated in one operation. The metadata is integrated within the data codeword itself, allowing the memory device to perform read-modify-write operations on both data and metadata simultaneously through a single access pass, thereby reducing latency while maintaining data integrity
Solution Approach 2:
The shared codeword structure serves multiple functions: it stores both data and metadata, enables error correction through integrated ECC, and facilitates efficient read-modify-write operations. This multi-functional design eliminates the need for separate access passes and reduces operational complexity
2Reliability
If additional information (metadata and error correction data) is stored in the memory array, then data integrity and error correction capabilities are improved, but space efficiency deteriorates
Solution Approach 1:
The patent combines metadata and error correction information within the existing data codeword structure rather than storing them as separate entities. This integration allows the memory device to maintain error correction capabilities and metadata storage without requiring additional dedicated space, thereby improving space efficiency
Solution Approach 2:
The metadata is nested within the data codeword structure, with the codeword containing both data bits and metadata bits in an integrated arrangement. This nesting approach allows error correction information to be stored efficiently within the existing memory array capacity without requiring separate storage locations
3Adaptability or versatility
If a conventional two-pass write operation is used, then data and metadata can be updated separately, but the number of cycles through the ECC circuit increases and resource utilization decreases
Solution Approach 1:
The patent merges the update operations for data and metadata into a single read-modify-write cycle. The shared codeword structure allows the memory device to read both data and metadata, perform corrections, and write back updated values in one operation, thereby reducing the number of ECC circuit cycles and improving resource utilization
Solution Approach 2:
The patent enables continuous operation by performing read-modify-write operations on the shared codeword in a single continuous cycle rather than requiring separate discrete passes. This continuous action maintains productivity while allowing flexible updates to both data and metadata
Data Source
AI summary
Apparatuses, systems, and methods for shared codeword in two-pass access operations. The memory may use a read read modify write write (RRMWW) cycle to write data and metadata to the array. Metadata and a data codeword are read out as part of two read access passes and combined into a shared codeword. Error correction is performed on the shared codeword, and then the corrected shared codeword is modified with write data and metadata. Updated parity is generated based on the modified shared codeword and the modified data and updated parity and the metadata are written as two write access passes.