Shared Pre-Decoding in Column Decoders for Multi-Bank Memory

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Solution Overview

Problem

Conventional semiconductor memory apparatuses require a large area for column decoders due to the increased number of main and pre-decoders needed as the number of banks increases, leading to decreased cell efficiency.

Innovation Solution

A column decoder design where a single pre-decoder is shared among multiple main decoders, reducing the overall number of pre-decoders and decoders needed, and a bank shared column decoder that selectively activates column paths between memory banks, allowing for a smaller area footprint.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of banks increases or banks are divided into sub-banks, then the memory capacity and access flexibility are improved, but the number of column decoders including main decoders and pre-decoders increases, leading to increased area and decreased cell efficiency

Engineering Contradiction:
Improvememory capacityVSAvoiddecoder area
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

A single pre-decoder is designed to serve multiple main decoders simultaneously. The pre-decoder generates pre-decoding signals that are shared among several main decoders, allowing one pre-decoder to perform the function of what would traditionally require multiple pre-decoders. This multi-functional design reduces the total number of pre-decoders needed in the system.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Multiple decoding functions are merged into a shared pre-decoder unit. Instead of having separate pre-decoders for each main decoder, the patent combines these functions into a single shared pre-decoder that generates common pre-decoding signals for multiple main decoders, thereby reducing the overall decoder area.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If more column decoders are provided to support increased number of banks, then the bank access capability is improved, but more lines are needed to connect to pre-decoders and transmit column addresses, increasing area and decreasing cell efficiency

Engineering Contradiction:
Improvebank access capabilityVSAvoidconnection lines
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The shared pre-decoder serves multiple main decoders and multiple banks simultaneously, making a single pre-decoder unit perform the function of multiple pre-decoders. This reduces the number of connection lines needed to transmit column addresses from pre-decoders to main decoders, thereby reducing device complexity while maintaining adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If a column decoder including main decoder and pre-decoder is provided for each half-bank, then the decoding precision for each segment is maintained, but the area dedicated to decoders increases

Engineering Contradiction:
Improvedecoding precisionVSAvoiddecoder area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges the pre-decoding functions of multiple half-banks into a single shared pre-decoder. While each main decoder still maintains its decoding precision for its specific segment, the pre-decoding stage is consolidated, reducing the total area dedicated to decoders without sacrificing decoding precision.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The decoding function is segmented into two distinct stages: a shared pre-decoding stage that handles common address decoding for multiple banks, and individual main decoding stages that handle segment-specific decoding. This segmentation allows area reduction in the pre-decoding stage while maintaining precision in the main decoding stage.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7782704B2Column decoder and semiconductor memory apparatus using the same
Publication Date: 2010.08.24 SK HYNIX INC
  • US7782704B2 patent drawing
  • US7782704B2 patent drawing
  • US7782704B2 patent drawing

AI summary

A column decoder includes: a plurality of main decoding units coupled to different memory banks that decode a pre-decoding signal and output column selection signals to the corresponding memory banks; and one or more pre-decoders, having a lesser number than the main decoders, which generates and outputs the pre-decoding signal by decoding the column address and the bank information signal.