Shared Comparator Analog Circuit for Voltage Regulation and ADC
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Solution Overview
Problem
Existing analog circuits in processor peripheral systems require multiple temperature sensors and analog-to-digital converters, leading to increased circuit area and complexity due to the need for separate comparators for voltage regulation and analog-to-digital conversion.
Innovation Solution
An analog circuit design that shares a comparator between a voltage regulator and an analog-to-digital converter (ADC) using a multiplexer, allowing the comparator to be switched between the two components based on trigger signals, thereby reducing overall circuit area and enhancing flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate comparators are used for voltage regulator and ADC, then functional reliability is improved, but circuit area and complexity increase
Solution Approach 1:
The comparator is designed to perform multiple functions by being shared between the voltage regulator and ADC through a multiplexer. The same comparator circuit can compare voltages for voltage regulation or convert analog signals to digital in the ADC, eliminating the need for separate comparator circuits for each function and reducing overall circuit area.
Solution Approach 2:
The patent merges the comparator resources of the voltage regulator and ADC into a single shared comparator unit. By combining these previously separate components and using a multiplexer to switch between them, the circuit achieves space efficiency while maintaining the functional capabilities of both modules.
2Adaptability or versatility
If separate comparators are used for voltage regulator and ADC, then functional independence is improved, but device complexity increases
Solution Approach 1:
The shared comparator maintains functional independence through time-division multiplexing controlled by a multiplexer. Each module (voltage regulator and ADC) can independently trigger the comparator when needed, and the multiplexer ensures that only one module accesses the comparator at a time, preserving functional independence while reducing circuit complexity.
Solution Approach 2:
The multiplexer acts as an intermediary component that manages access to the shared comparator between the voltage regulator and ADC. It coordinates the switching between modules, ensuring that each can independently use the comparator without direct interference, thus maintaining functional independence while simplifying the overall circuit architecture.
3Area of stationary object
If a shared comparator is used, then circuit area is reduced, but access coordination complexity increases
Solution Approach 1:
The multiplexer serves as a control intermediary that automatically manages the switching between voltage regulator and ADC access to the shared comparator. This intermediary handles the coordination logic, preventing direct conflicts between modules and minimizing the control complexity that would otherwise be required to manage shared resource access.
Solution Approach 2:
Each module (voltage regulator and ADC) can independently generate trigger signals to access the shared comparator through the multiplexer. The system enables self-service access where modules request comparator usage through standardized trigger mechanisms, and the multiplexer automatically grants access based on current operational state, reducing the need for complex external coordination.
Data Source
AI summary
An analog circuit including a voltage regulator, at least one analog-to-digital convertor (ADC), at least one comparator and a multiplexer is provided. The voltage regulator generates an output voltage. The at least one ADC generates at least one digital signal. The multiplexer is configured to conduct the at least one comparator to either the voltage regulator or the at least one ADC. When the voltage regulator is triggered, the multiplexer conducts the at least one comparator to the voltage regulator, and the voltage regulator generates the output voltage according to an output of the at least one comparator. When the at least one ADC is triggered, the multiplexer conducts the at least one comparator to the at least one ADC, and the at least one ADC generates the at least one digital signal according to the output of the at least one comparator.