Shared Comparator Circuit for HDR Pixel Readout in Small Area
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Solution Overview
Problem
Existing comparators for high dynamic range (HDR) technology require a significant increase in circuit area due to the need for two systems of differential amplification pairs and reset transistors, leading to issues with frame rate and artifact suppression.
Innovation Solution
A comparator configuration that includes a first transistor, a second transistor, a third transistor, and additional transistors and switches, allowing for selective connection of the potential of the drain of the fourth transistor or the fifth transistor to an output terminal, thereby reducing circuit area while maintaining HDR capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If two systems of differential amplification pairs are disposed to perform AD conversion at high gain while holding reset level signal at low gain, then AD conversion capability is improved, but circuit area increases significantly
Solution Approach 1:
The patent merges two separate comparator systems into a single integrated circuit by sharing the differential amplification pair between high-gain and low-gain operations. The same transistors and capacitors are used for both reset level holding and pixel value reading, eliminating the need for duplicate circuits and significantly reducing area while maintaining full AD conversion capability.
Solution Approach 2:
The comparator circuit is designed with multi-functionality where a single differential amplification pair serves dual purposes: holding reset level signals at low gain and reading pixel values at high gain. The switches and capacitors are configured to dynamically route signals for different operations, allowing one circuit to perform multiple functions that previously required separate dedicated circuits.
2Adaptability or versatility
If switches are inserted into output path of the amplifier to select between high gain and low gain operations, then gain selection capability is improved, but switch size increases and characteristics deteriorate
Solution Approach 1:
The patent introduces a current mirror circuit as an intermediary mechanism to transfer the output signal from the shared differential amplification pair to the appropriate output node. Instead of using large switches directly in the output path, the current mirror acts as a mediator that can steer current to either the high-gain or low-gain output node, reducing switch size and minimizing impact on amplifier characteristics.
Solution Approach 2:
The patent replaces mechanical switch-based signal routing with a current mirror-based electrical routing system. The current mirror uses transistor gate control to redirect current flow without requiring large physical switches in the signal path, thereby reducing switch size and minimizing signal degradation while maintaining gain selection capability.
Data Source
AI summary
To improve characteristics of a comparator.A comparator includes first to fifth transistors, first and second switches, and first and second capacitors. The first transistor has a gate to which a reference signal is input. The second transistor shares a source with the first transistor. The third transistor shares a source with the first transistor and shares a drain with the second transistor. The first switch is connected between a gate and the drain of the second transistor. The second switch is connected between a gate and the drain of the third transistor. The first capacitor has a first end connected to the gate of the second transistor and has a second end connected to an input signal terminal. The second capacitor has a first end connected to the gate of the third transistor and has a second end connected to the input signal terminal. The fourth transistor shares a drain with the first transistor and has a gate connected to the drain. The fifth transistor shares a drain with the second transistor, shares the drain with the third transistor, and shares a gate with the fourth transistor. A potential of the drain of the fourth transistor or the drain of the fifth transistor is selectively connected to an output terminal.