Shared Configuration Registers for Fast Runtime Logic Reconfiguration
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Solution Overview
Problem
Current programmable logic devices require time and resources to configure and reconfigure, as they store only one configuration bit pattern at runtime, leading to increased memory and resource consumption with growing functional demands.
Innovation Solution
A programmable logic device with a configuration bus, shared configuration registers, and switch devices that allow multiple functional modes, enabling independent selection and sharing of configuration patterns, reducing memory requirements through a common configuration memory architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple configuration patterns are stored in separate memory for each programmable hardware unit, then each unit can be independently configured, but memory consumption and resource usage increase significantly
Solution Approach 1:
The patent merges the configuration storage resources of multiple programmable hardware units into a single shared configuration register file. Instead of each hardware unit having dedicated configuration memory, all units share the same configuration register file, which stores configuration patterns for multiple functions. This consolidation dramatically reduces total memory consumption while maintaining the ability to independently configure each hardware unit through selective addressing.
Solution Approach 2:
The configuration register file is designed to serve multiple programmable hardware units simultaneously, making it a universal resource. The same configuration register file can store and provide configuration patterns for different hardware units depending on the selected function mode, enabling one memory structure to fulfill multiple configuration needs without requiring separate dedicated memory for each unit.
2Adaptability or versatility
If configuration data is moved from program memory to configuration registers during runtime, then reconfiguration is possible, but the process consumes time and resources
Solution Approach 1:
The patent pre-loads multiple configuration patterns into the shared configuration register file before runtime reconfiguration is needed. By having configuration patterns already available in the configuration registers rather than stored only in program memory, the system eliminates the time-consuming transfer process during runtime. The hardware unit can switch functions by simply selecting different pre-loaded patterns from the configuration register file.
Solution Approach 2:
The configuration register file acts as an intermediary buffer between program memory and the programmable hardware unit. Instead of directly transferring configuration data from program memory to the hardware unit during runtime (which is time-consuming), the system uses the configuration register file as an intermediate storage layer that holds ready-to-use configuration patterns, enabling fast switching through simple register selection.
3Quantity of substance
If configuration registers are commonly shared among multiple hardware units, then memory resources are reduced, but access control and selection complexity increases
Solution Approach 1:
The patent segments the shared configuration register file into function-specific sections or groups, where each segment corresponds to configuration patterns for a particular hardware unit or function type. This segmentation allows the control logic to efficiently manage access by targeting specific segments rather than searching through the entire shared register file, reducing the complexity of access control while maintaining resource sharing.
Data Source
AI summary
The disclosure relates to technology for configuring programmable logic devices having multiple programmable hardware units configurable in one or more functional modes. The programmable hardware units are coupled to independent switch devices (e.g., multiplexers) that select configuration patterns stored in a common and shared configuration memory. The configuration memory includes a set of configuration registers to store the configuration patterns, which configuration patterns correspond to the one or more functional modes. The configuration registers may be addressed using an index of addresses stored in memory that identify a select line in one of the switch devices for a particular programmable hardware unit. Each select line in a switch device corresponds to a particular one of the configuration registers storing the configuration pattern. The addressed configuration register is accessed to retrieve the configuration pattern and configure the programmable hardware unit.